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GlobalFoundries joins Google’s open source silicon initiative
- koeng 4y agoSuper excited for this! Right now I’m working on a project to build open source DNA synthesis chips (if deployed right, drops DNA synthesis cost by 100-500x market price), and efabless with their tools created with Google’s support have simply enabled the project to even be possible. I am grateful to Google for doing this.
- octoberfranklin 4y ago> have simply enabled the project to even be possible Are you sure about that? The mandatory "Caravel" pad ring occupies the entire top layer of the chip as well as a ring around the edges. It hermetically entombs the design area that you control. There is no exposed surface under your control for any kind of chemically-relevant device like a microwell.
- koeng 4y ago"Thank you for reaching out to Efabless! To answer your questions, we can support requests for bare die in our QFN shuttle programs, with the next QFN shuttle having a tapeout of November 14, 2022. Also, the material that you were asking about is aluminum." Correct me if I am wrong, this means I could do this. Perhaps I am wrong! In which case I should find a different chip supplier.
- octoberfranklin 4y agoUnfortunately you are wrong. The padframe and top metal layer which "entomb" Caravel designs are both part of the die. They are not part of the package. Omitting the package does not help you here. You might be confusing the padframe with the leadframe. The padframe is part of the die, the leadframe is part of the package. In a QFN package they are connected to each other by extremely thin gold wires.
- koeng 4y agoThank god for people correcting me on the internet then! Can look for other providers thanks!
- koeng 4y agoThe answer is actually nuanced. "From the ChipIgnite program you can get bare die; from the Open MPW program, you can't. If you submit something on a ChipIgnite shuttle run, then the pads will be exposed, along with any other places on the chip that you place overglass cuts (i.e., you can place your own pad cuts internal to the user area)."
- octoberfranklin 4y agoLink? The other problem is that even for $10,000 the ChipIgnite program won't give you a confirmed booking. You have to submit your design and then they decide if they feel like manufacturing it. Any chip worth paying $10k to fab is going to involve an engineering sunk cost of around 5 times that amount. Which is why Real Fabs take your money and give you a confirmed booking.
- sylware 4y agoWhat's happening with Taiwan/TSMC right now is... china is adamant about taiwan, like putin about the donbass. So it is not unreasonable to think that what is happening for the donbass, will happen for taiwan sooner or later. maybe it is time for top-notch foundries to move out (and the ppl who would require more freedom that the china regime tolerate, like in hong-kong).
- colordrops 4y ago
- google234123 4y agoThis is a shitpost.
- sorry_outta_gas 4y agoThe emails leaked a few years ago on twitter say different
- monetus 4y agoHave a link? Curious, but seemingly hard to find.
- colordrops 4y agoWhat did I say that was inaccurate or untrue?
- skybrian 4y agoIt's an off-topic complaint. Just because someone posts a link about Google (or substitute any other company) doesn't mean it's okay to post whatever complaints about Google you want. Particularly when they're the same sort of repetitive complaints people post every time. We've heard it, give it a rest.
- colordrops 4y agoIs it a random complaint though? How is it any different from everyone regularly warning against investing in google services because they are shut down so often? Seems pretty relevant for anyone who is considering investing in this project but isn't aware of Google's behavior with other large open source projects, e.g. Android. Imagine if people told naysayers to shut up when Microsoft was trying to destroy Linux with the SCO lawsuits. Your argumebt actively damages the open source cause.
- redanddead 4y agoI might get some hate for this, but Google seems to be doing some really cool things, like in fintech as well as this silicon project. Google Finance is one of the only players I've seen with an interest of opening things up when so much of the industry is about pushing others out and restricting access. Like for example the CME deal, to open source live, low latency stock market data. Bloomberg might let you rent it for 25k a year if you're lucky. Google? Yeah just hook into the websocket bro, it's free. Someone's gotta do it Most of the stock market data the avg person sees is 15 minutes delayed by request of the NYSE, and in a world where trades are reaching the 3 millisecond and below mark, that's a very long time. So Google opening up what could be <20ms data might be able to help some applications. Not saying it's a silver bullet either. I wish they would take on even more big projects that need to be tackled. Like I want to see a google branded remote controlled barge out in the pacific garbage patch that the public is controlling through a google web app or some other insane, good projects. Idk when you deal with finance companies all day, even google seems moral. However, it's not looking good this quarter for all tech cos
- api 4y agoWow, how things have changed. I've been here since back when Google could do no wrong. Now they're a poster child for shady surveillance capitalism. Same with Elon Musk. I remember him being compared to a comic book hero. Now he's an alt-right racist (if you are a leftist) or an evil globalist technocrat (if you are a rightist).
- gchadwick 4y agoWhen the first open SkyWater 130nm PDK came out, with Google paying for free shuttle runs I did wonder how long the money would keep going. I assumed they'd fund a handful of shuttles in the hope that kick starts wider usage. With this announcement and the other SkyWater 90nm they're bringing out (https://opensource.googleblog.com/2022/07/SkyWater-and-Google-expand-open-source-program-to-new-90nm-technology.html https://opensource.googleblog.com/2022/07/SkyWater-and-Googl...) it looks like they're keen to fund this for the long haul which is fantastic news. I think there's great potential in open silicon but precious little of it around right now. Open tooling is still in early development stages in particular for implementation flows (i.e. actually producing a silicon layout from your RTL design). Development here is stifled by how closed this world is. Open PDKs, that can be used for real chips, are a great boon and I hope will really accelerate developments.
- specialist 4y agoAm noob. I don't know what a shuttle is. efabless.com makes custom short run chips, right? Does this mean Google covered the cost of 240 chips for other people? $2.34m. That's kinda awesome.
- skywal_l 4y agoCan somebody ELI5 this to me? Wbo will that help? And how? 180nm seems big, at least for computer CPUs.
- grandmczeb 4y agoThis is a very imperfect analogy, but CPUs are typically designed using a high level language like SystemVerilog (equivalent to something like C++ in the software world.) To actually get the CPU manufactured, you have to "compile" it into a binary format that specifies the physical layout of the chip while respecting a set of design rules for whatever process you're targeting. These rules are usually considered highly confidential since they can reveal manufacturing details that the foundry wants to keep secret. This secrecy is part of the reason that open source never really took off for silicon the way it did in the software world - imagine if every time you wanted to compile your code for a new machine you had to pay a bunch of money and sign an NDA. The hope here is that open sourcing the design rules will help build an ecosystem of open source silicon. While it's true that 180nm is too big for anything high performance, it's perfectly fine for hobbyists who don't have the money required for more advanced nodes anyway. On the foundry side, they don't need to be as secretive about old nodes and it might increase demand for underutilized manufacturing capacity.
- unethical_ban 4y agoI dream of a world where public libraries have CPU printers. 180nm isn't crazy awful though, is it? That's about 20 years back, so you won't be doing ML, but it's enough to have industry applications and low power general purpose computing.
- adrian_b 4y ago180 nm is what the first generation of Intel Pentium 4 and the second generation of AMD Athlon have used, in 2000. While you would not want to make a CPU in 180 nm now, or any purely digital circuit, which could be better made with a FPGA, unless you need clock frequencies over 1 GHz, if you want to make any mixed digital-analog circuit with an important analog part, 180 nm can be fine. Any analog circuit part made in 180 nm will not be much larger than in any up-to-date process, because the dimensions of the analog components are determined by functional requirements, such as noise or maximum current, not by the lithography limits.
- unity1001 4y agoGood initiative.
- newaccount2021 4y ago
- Kukumber 4y ago
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- ricksunny 4y agoBeen a while since I was in the semiconductor industry, but it looks like this open-sourcing is intended to free up the ecosystem from dependence on Cadence EDA. Nice, could open up opportunity for creation of a lot of cottage fabless semiconductor startups. (does anyone known whether Cadence had ever gotten on the freemium offering model?)
- arroz 4y agoCadence works on some sort of subscription nowadays
- rektide 4y agoVery excited to see another foundry join up! Welcome GlobalFoundries! Last week SkyWater announced a 90nm PDK, which is smaller than the current SkyWater 130nm. Also crucially, this one is FDSOI (fully-depleted silicon on insulator), which keeps chips from leaking power, meaning this should be much more ideal for any kind of mobile always-on design. Neat. And now comes GF's 180MCU PDK. At first, it's like: this is bigger, what the heck! But it's designed for mixed signal & power designs, like Power Management Integrated Circuits (PMICs). Really neat having something a little smaller and something a little bigger right near where we started. I really hope some of the existing people who've done open chip design on the existing shuttles get to make similar-ish chips on the new bigger & smaller processes & can nicely characterize some of the performance differences. This all just makes so much sense. Making sure chipmaking is a healthy, robust, creative, growing industry is in everyone's interest. Without efforts like this, it feels like the industry is at risk of too much consolidation, of everyone getting bought out and/or giving up, and there not being vibrant chipmaking at all. The wave of buyouts across the 201X's was shocking. I continue to think part of the chipmaking crunch was just that there are so many less independent entities now; the diversity of the ecosystem is way down.
- octoberfranklin 4y agoImportant note: this is a high voltage process for things like power+battery management chips. It is not a general logic process. The press release really should mention this. The transistors on this process are very slow and power-hungry, even for such an old process -- the lowest rated supply voltage for this process is 3.3 volts whereas 1.8 volts is typical for 180nm. That's ~3.35x the active power consumption and slower switching speeds due to higher threshhold. It's meant for people who had 350nm designs (mid-1990s) and want to migrate them with the minimum possible effort (nearly all fabs have shut down their 350nm lines). It is totally awesome that Google were able to convince GF to release this PDK! But they should be more up-front about the fact that this is a High Voltage process; most people won't notice the "MCU" at the end of the process name or know what it stands for. Their announcement about a 90nm process with Skywater last week is a big deal; this not so much, unless it's just the first of a series of process releases from GloFo.
- adrian_b 4y agoYou are right that this is very important. Also this does make this 180 nm variant much more useful. There are many kinds of interfaces or analog devices for which such a high-voltage process is absolutely needed. Now, you can design a complete chip set for certain applications, e.g. with a central chip designed with the 90 nm Skywater PDK and one or more peripheral chips designed with the 180 nm GlobalFoundries PDK, for power management or various interfaces.