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DDR5 Is Coming: First 64GB DDR5-4800 Modules from SK Hynix
- morceauxdebois 6y agoI'm happy that I put off upgrading my pc long enough to skip a RAM generation.
- speeder 6y agoI have a 4690K and my RAM is a 32GB EVGA DDR3 ram that I suspect was made by hynix or the other manufacturer of fast rams, that runs at speed up to par with the slowest DDR4 but with DDR3 latency, it is very awesome. I wonder if DDR5 will be fast enough to compensate for the slower latency (or maybe they improved latency this time?) To be honest I didn't felt yet any need to move off my current machine, I would only upgrade its GPU, but I can't do that because I can't afford a new GPU AND a new Monitor (I use a CRT monitor with VGA cable... it is a very good monitor so no reason to replace it, but newer GPUs don't support it).
- Retric 6y agoLatency is significantly impacted by the physical distance between RAM and CPU’s. Which combined with modern cache sizes means they get diminishing returns trying to minimize it and thus make different tradeoffs.
- karmakaze 6y agoIt matters but I wouldn't say it's significant for a typical design. A ns is about 12in (30cm) from Grace Hopper's famous wire visual aid.
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- Retric 6y agoDon’t forget it’s round trip and more than just across the motherboard but also to the edge of chips and across DIMM modules.
- formerly_proven 6y agoIs that so? I don't think it is. Core-to-RAM latency is in the neighborhood of 50 ns (well-tuned Intel system with low-latency memory) to ~80 ns (bottom-of-the-barrel system). At propagation speed, that's about 10 meters. A big chunk of this latency is internal to the CPU (so is not influenced by distance to the memory at all), another big chunk is the inherent slowness of accessing a DRAM array (10+ ns, independent of the location of the memory). It's worth pointing out how little this has changed over the past decades. A 2006 AMD CPU is 100 % competitive in regards to memory latency with Intel's 2020 flagship desktop CPU.
- Retric 6y ago10 meters one way = 5 meters round trip. Trace the longest physical path a signal travels from your CPU to a memory chip on the DIMM and back, it’s likely longer than you think. And yea on it’s own plenty of overhead, but everyone making latency tradeoffs bashing their design as part of a larger system with a single unavoidable limit.
- gruez 6y ago>that runs at speed up to par with the slowest DDR4 but with DDR3 latency, it is very awesome. AFAIK ddr4 having higher latency than ddr3 is a myth. It has a higher cl number, but that's measured in cycles, so the higher cl number of ddr4 is compensated by its higher clocks. The actual latency (measured in nanoseconds) is about the same, or slightly lower in ddr4 than ddr3.
- epmaybe 6y agoI think that's what he's saying, that if the latency is equivalent on best ddr3 and lowest ddr4 and ddr3 is cheaper or you already own it maybe better to wait.
- charwalker 6y agoAnandtech also handled this question: https://www.anandtech.com/show/16143/insights-into-ddr5-subtimings-and-latencies https://www.anandtech.com/show/16143/insights-into-ddr5-subt...
- dmead 6y agoIts 2020 and you're still on a crt?
- gogopuppygogo 6y agoDuckhunt only works on a CRT with the original light gun. What are your priorities?
- ben-schaaf 6y agoNot anymore: https://youtu.be/hfo004_4xwU https://youtu.be/hfo004_4xwU
- gogopuppygogo 6y agoThat is not the original light gun.
- mywittyname 6y agoSome of those last generation CRTs had amazing picture. I had one from 2003 or so that could do 2048x1564 with a picture better than anything you could get from an LCD until the late 2000s.
- ed25519FUUU 6y agoAnd with high refresh rates!
- Wowfunhappy 6y agoAnd next-to-zero latency.
- deleted 6y ago[deleted]
- TheFlash 6y agoEurogamer did write a review about playing modern games on a (very good) CRT monitor [1]. It's better than any LCD and even OLED monitors according to them: [1] https://www.eurogamer.net/articles/digitalfoundry-2019-modern-games-look-beautiful-on-crt-monitors https://www.eurogamer.net/articles/digitalfoundry-2019-moder...
- satisfaction 6y agoSame here, I'm running an FX-8370 and DDR3 now, going to build a Threadripper + DDR5 late next year, hopefully.
- nullifidian 6y agoYou are very patient. I'm not sure about skipping this generation, because who knows when we will get ECC UDIMMs for AMD cpus. It could be late 22 or or even mid 23.
- satisfaction 6y agoI've been waiting for DDR5, I knew it was coming and my PC runs the games I play just fine on DDR3. I do have a Thinkpad p51 that has Xeon/DDR4, so I didn't completely skip DDR4.
- pedrocr 6y agoECC on AMD seems quite hard in practice even though the CPU support isn't artificially limited like with Intel. Making sure the motherboard supports it is hard and then the RAM options are extremely limited and generally quite slow and expensive. Threadripper is maybe better but that's quite a jump in cost. It would be so nice to finally be able to assemble low-cost home servers and workstations with ECC but it remains a niche where you have to give up a lot to get it.
- Spooks 6y agoI like to grab RAM towards the end of the generation, so far it has been the best bang for my buck (for my personal computer). From the production estimates, looks like I'll jump into DDR5 at the end of 2023 or most likely 2024
- gambiting 6y agoYeah, when DDR4 came out first, the early modules were easily outperformed by good DDR3 modules on every metric except power consumption. DDR5 will be king in a few years.
- rosege 6y agoIt will be interesting to see if history repeats. I'm holding off buying a new PC until this is known.
- ww520 6y agoThat's a good idea. Haven't thought of that. The price of the ending generation would be great while the maturity has peaked.
- pjc50 6y agoThat reminds me, I was going to buy a PS4.
- overcast 6y agoPS5 is backwards compatible FYI.
- NikolaeVarius 6y agoNot really. They plan to try to make "as many PS4 games BC as possible" which means they are actively porting games they deem worth porting, versus it being natively supported
- dragontamer 6y agoPS5 is an x86 CPU + AMD RDNA GPU. PS4 was an x86 CPU + AMD GCN GPU. A huge amount of games will be portable from the get-go. GCN and RDNA have extremely similar assembly languages. The only major assembly language change from GCN -> RDNA is DPP / cross-lane operations (kinda like pshufb from x86). But I'm not even sure if the PS4 had those instructions.
- NikolaeVarius 6y agoThat isn't the original point. The PS4 is not natively backward compatible, the base game needs to be ported. Native BC would be 1. It runs native hardware (PS2 EE on Early PS3) 2. It runs without updates required (PS2 running inside emulator on later PS3) This requires actual updates by the dev for individual games to work
- monocasa 6y agoOr it's _really_ close, but the systems are complex enough that they feel they need to QA/cert the games again even if the vast majority of games require no changes.
- josmala 6y agoI was planning on same thing, until I estimated how much faster modern PC was at single threaded compilation tasks compared to my old one, and how it impacted my productivity. I should of upgraded earlier.
- SketchySeaBeast 6y agoWhat did you move from and then to? As near as I can tell IPC haven't increased that much in the last little bit. Or was your CPU pretty old?
- josmala 6y agoI thought so also, but decade of small improvements do accumulate to a large number. Something like 20% improvement 4 times would be doubling the IPC, but single threaded compilation is where I got more than that. The after purchase testing was even better than expected. i7 920 compiled a specific compilation unit in 14 seconds. 3900x in 3.5 seconds. And that was before any tuning, I had done some bios tuning for i7 920, while 3900x I just limited the power to make it quieter. The IPC is more than double, the larger caches are probably the thing that pushes IPC beyond expectations. (I got more cores to improve scaling of multithreaded code.) Both times were recompilations where there was enough ram to have all the files cached and the the folders used where on ssd:s with modern CPU used nvme and older one SATA. Even if the nvme matters that upgrade wouldn't of been possible without getting modern MB. The make system was make, and what I used was LLVM tutorial code in single file that included many LLVM headers. The software wasn't upgraded between those runs, just moved disks from old system to new system and copied the data. I did look before the purchase if there was IPC improvements that would of made more sense to buy new than buy some Westmere 6 core to upgrade my system. Results made it clear to me that getting any cheap new CPU would of been preferable over wasting time with getting the westmere. The IPC improvements for compilation were way higher than average IPC improvements. But even sandy bridge was weak enough in the benchmarks that it would of made sense to upgrade from that. Before purchase I just looked from phoronix benchmarks/open benchmarking database a compilation benchmark that had worst CPU scaling for more cores and used that as approximation for single threaded compilation. My own results were much larger than what I assumed it would of been based on comparing the sandy bridge to modern CPU:s and then multiplying that with clock speed advantage and IPC advantage of sandy bridge vs i7 920. Oh, when I got i7 920 I decided not to upgrade until I got 8 cores. Then it was AVX-512 happened I knew I must have that so that I could play around optimizing code with it, Intel just could get it's 10nm very soon so that I could get those 8 core AVX-512 parts in reasonable price and power envelope. I just did the math, and realized wasted time because slow CPU would cost me more over next 2 years than upgrading.
- gnarbarian 6y agoI try to refresh when a new ram gen launches with a new socket. That gives me a good shot at long term upgradability. Waiting on zen 4 now for my next complete build.
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- robohydrate 6y agoi7-4790k and 16gb DDR3-2400 from early 2015 here, really can't wait to upgrade to something newer with DDR5
- nullc 6y agoMemory piggybacked on CPUs with TSVs when?
- the_hoser 6y agoThis is already a thing in lower-power applications. Thermals become an issue in higher-power applications.
- f00zz 6y agoThe processor in the Fugaku supercomputer uses HBM2: https://en.wikipedia.org/wiki/Fugaku_(supercomputer) https://en.wikipedia.org/wiki/Fugaku_(supercomputer)
- jeffbee 6y agoIf you thought HNers were insufferable whiners regarding RAM or NAND soldered to motherboards, just wait until they start marketing monolithic CPU+memory chips.
- fomine3 6y agoIntel Lakefield https://www.anandtech.com/show/15877/intel-hybrid-cpu-lakefield-all-you-need-to-know/3 https://www.anandtech.com/show/15877/intel-hybrid-cpu-lakefi...
- nullifidian 6y agoWill we get performance increases, and how big will they be in the average case, not for some specific codes with low cache hit ratio on large datasets, and attributed solely to bandwidth increases and not architecture IPC improvements?
- brixon 6y ago"For bandwidth, other memory manufacturers have quoted that for the theoretical 38.4 GB/s that each module of DDR5-4800 can bring, they are already seeing effective numbers in the 32 GB/s range. This is above the effective 20-25 GB/s per channel that we are seeing on DDR4-3200 today." That looks like a 20%+ improvement IF you are bottle-necking on DDR4.
- Sebb767 6y agoSo, it's worth upgrading if you're running Redis or Dwarf Fortress :)
- BeefySwain 6y agoMy understanding is that Dwarf Fortress is memory LATENCY limited, not bandwidth. Definitely could be wrong though.
- h-jones 6y agoHow does this play in with the fact that the DDR5 is clocked at 4800mHz and the DDR4 is at 3200? Would we not expect a 50% improvement with respect to transfer rates with a 50% increase in clock? I really don't know. There are even 4800mHz DDR4 DIMMs available now, even if they are niche. EDIT: DDR4 is 3200 not 3800.
- Macha 6y agoDepends a lot on your CPU's architecture as well as workloads, how far ahead it prefetches vs how often it's stalled on large memory reads. So it's hard to know. e.g. Zen+ (Ryzen 2000) was seeing 10% in some gaming workloads going from DDR4-2400 to DDR4-3600, but it's much less drastic on Intel CPUs or even Zen 2 (Ryzen 3000) because the memory controller is smarter so the slower RAM is less of a detriment. And then if you go above 3600mhz (or 3800mhz if overclocked) on zen 2 you start getting negative returns for a bit because the CPU memory controller can no longer run at the same clock as the memory and that induces overhead. But maybe a 4800mhz if it can be stable easier gets far enough ahead of that penalty that the improvement goes positive again. Or maybe Zen 4/DDR5-lake just works with memory entirely differently and the performance gains are massive or neglible. The short of it is it's very hard to make predictions here.
- orliesaurus 6y agoYeah, but to the casual user like me, that's going to help with load times... go from 2 seconds to 1 second.
- nullifidian 6y agoLoad times? I doubt it. Load times are more about cpu and nvme.
- melling 6y agoHowever, all those people who complained that the Atom editor took too much memory are about to experience a new world when they buy their next computer. I used Emacs back when people joked “Eight Megs and Constantly Swapping”
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- imtringued 6y agoTo be fair. Electron bloat doesn't grow with application size. Only incompetence does. By using electron you are basically forcing your application to need around 200-300MB of RAM no matter how trivial it is, but that's all there is to it. Poor application performance has more to do with bad application development. Nothing prevents you from e.g. building Atom in a way that lets you view files bigger than 2MB with good performance or building a Slack client that doesn't leak memory. I can run lots of tabs in Firefox with good performance but if each tab was using its own browser instance I would run out of memory very quickly.
- TuringNYC 6y agoOften the initial consumers would be enterprises instead of casual users. There are numerous enterprise use cases where higher bandwidth and lower latency would be worth the cost. Some that come to mind are in financial services and ML inferencing. I can imagine high-mem compute instances of cloud service providers being an obvious place for these. Also, going for 2 to 1 seconds is pretty huge if you're doing some operation hundreds or thousands of times a day.
- freedomben 6y agoWhen will this be available with AMD? I'm currently shopping for a new build, and willing to wait 6 months or so, but beyond that I'm not sure ...
- tlamponi 6y agoAMD will present its next generation Ryzen CPUs, based on Zen 3, the day after tomorrow, 08.10.2020 [0][1] - maybe we can get more info about DDR5 compatibility already then. [0]: https://twitter.com/AMDRyzen/status/1312080706739339266 https://twitter.com/AMDRyzen/status/1312080706739339266? [1]: https://www.amd.com/en/events/gaming-2020?sf238352749=1&sf238436836=1 https://www.amd.com/en/events/gaming-2020?sf238352749=1&sf23...
- gameswithgo 6y agoI haven't been able to find any specs on latency, and whether it has improved or not. I assume it hasn't, because it doesn't tend to, but does anyone know for sure?
- IanCutress 6y agoLuckily I just posted this at AnandTech :) I couldn't find the information posted anywhere online, so I wrote it up. https://www.anandtech.com/show/16143/insights-into-ddr5-subtimings-and-latencies https://www.anandtech.com/show/16143/insights-into-ddr5-subt...
- Zenst 6y agoI like what IBM has done with their latest power chip - effectually made the whole memory interface upgradable. https://www.nextplatform.com/2020/09/03/the-memory-area-network-at-the-heart-of-ibms-power10/ https://www.nextplatform.com/2020/09/03/the-memory-area-netw... "the shift from dedicated DDR4 memory controllers to Serdes-based, high speed differential signaling mixed with buffer chips on memory modules that can be taught to speak DDR4, DDR5, GDDR6, 3D XPoint, or whatever, is an important shift in system design and one that we think, ultimately, the entire industry will get behind eventually."
- zdw 6y agoAdds a latency hop, which generally can be dealt with by prefetching and larger caches on the CPU side. There's speculation that AMD is going to do the same - in Zen 2 and later designs the CPU chiplets are coupled with different IO dies depending on the design (Ryzen, Threadripper, Epyc), and swapping out the IO die for one that has support for new/different memory types would less work than taping out a whole new monolithic CPU.
- jeffbee 6y ago> CPU chiplets are coupled with different IO dies depending on the design How does that differ from Intel's approach?
- formerly_proven 6y agoIntel desktop CPUs are monolithic. A 10900K is a single die, meanwhile a AMD 3900X is three dies: two compute dies and one I/O die (which are sourced from two manufacturers on two different processes afaik). An AMD server CPU has the same compute dies, except more of them, and a very different IO die. The AMD compute dies are only connected to the IO die and other compute dies (and power). All IO connections exclusively go through the IO die, so the IO die can be customized to change the IO of the CPU without changing anything about the compute dies. It would be entirely feasible to just re-spin the IO die to add support for different memory, Thunderbolt or other IO ports. The IO die is also made on a cheaper, lower-density and performance process (14 nm / 16 nm) than the compute dies (7 nm).
- ksec 6y agoThe unanswered question is, will it be cheaper? Price / GB of DRAM hasn't actually fallen much in the 10 years of progression.[1] LPDDR is still over $3/GB. UDIMM is still ~$3 /GB, which is about the same in 2010 / 2011. i.e Despite what you may heard about DRAM price collapse in 2019, the price floor of DRAM has been pretty much the same over the past 10 years. Every other silicon has gotten cheaper, NAND, ICs, just not DRAM. And yet our need for DRAM is forever increasing. From In-Memory Datastore on Servers to Mobile Phones with Camera shooting rapid 4K images. Compared to NAND, or Foundry like TSMC, there are clear roadmaps where cost is heading, and what cost reduction we could expect in the next 5 years, along with other outlook. There is nothing of sort in DRAM. At least I dont see anything to suggest we could see $2/GB DRAM, if not even lower. I dont see how EUV is going help either, there won't even be enough EUV TwinScan machines going around for Foundries in the next 3 years, let alone NAND and DRAM. The only good news is the low / normal capacity ECC DRAM has finally fallen to ~$5/GB. ( They used to be $10-20/ GB ). [1] https://secureservercdn.net/166.62.107.55/ff6.d53.myftpupload.com/wp-content/uploads/2019/11/2019-11-20-DRAM-Spot-2012-19.jpg https://secureservercdn.net/166.62.107.55/ff6.d53.myftpuploa...
- tw04 6y agoIt seems nearly impossible that they aren't back to price fixing. https://en.wikipedia.org/wiki/DRAM_price_fixing https://en.wikipedia.org/wiki/DRAM_price_fixing
- kasabali 6y agoThey aren't price fixing anymore. Now it's called CapEx and water start.
- bagpuss 6y agowater start?
- l33tfr4gg3r 6y agoThis may be what he means? https://en.wikipedia.org/wiki/Waterstart https://en.wikipedia.org/wiki/Waterstart
- DCKing 6y agoOne thing I'd like to understand better about DDR5 is how well the built-in ECC is going to work to improve reliability. DDR5 comes with "chip level ECC" [1] of which the main purpose is to be able to better sell highly complicated memory chips with minor defects. But as a consequence as I understand, it will allow for the correction of single bit memory flips. With regular DDR4 or previous generations, you don't get any error correction. Any bit error in your DDR4 modules has the potential to corrupt data. If you want to be protected from that, you will need to get ECC memory. Unfortunately, anything with "ECC" in hardware for unfortunate reasons gets labeled with an "enterprise" sticker. And that means a certain price level, and a certain power consumption. (Yes I know you can get Ryzen boxes that work with ECC, but that's still PC sized hardware for hundreds of dollars). If DDR5 can bring error correction to the masses - like in single board computers, 10W NAS boxes, smartphones - that would be pretty cool. But I'm not sure whether my reading of that is correct. [1]: https://www.anandtech.com/comments/15912/ddr5-specification-released-setting-the-stage-for-ddr56400-and-beyond/708566 https://www.anandtech.com/comments/15912/ddr5-specification-...
- klodolph 6y agoI wouldn’t be surprised if at some level that physics has forced the manufacturer’s hand—that previously low error rates are now unacceptable when you multiply them by 64GB.
- kasabali 6y agoWhat I read around is that's not the enterprise ECC, it's more akin to ECC bits used in flash memory. It'll allow manufacturers to play fast and loose with memory.
- mc32 6y agoSo in other words, error prone memory modules don’t have to be tossed and can be sold because they will be self correcting...?
- kasabali 6y agoThat's what I understand. Frequencies will be higher and manufacturing process denser later in DDR5 lifecycle so they must be expecting more errors.
- aresant 6y agoDoes anybody have a recommendation for a benchmarking suite that in app shows where your bottlenecks are? eg as simple as CPU utilization, GPU utilization, RAM speed utilization?
- scottlamb 6y agoSort of. On Linux, have you tried toplev? https://github.com/andikleen/pmu-tools https://github.com/andikleen/pmu-tools It uses CPU performance counters to show things like ITLB_Misses or MEM_Bandwidth. It won't show when you're waiting for GPU/SSD/etc because those aren't visible from CPU performance counters. I'm not aware of a single tool that will do everything, unfortunately. Also, this isn't a "benchmarking suite"; it's a tool you can use to instrument whatever load you're running, which I'd say is better. It's often used to improve software but could also identify if faster RAM will help.
- wickedsickeune 6y agoBenchmarking of what? Based on the task, you need a specific benchmark. If it's gaming, there are various benchmarks, run them, see utilization, whichever is not 100% is the bottleneck. If it's computation, it's more complicated to discover the bottleneck (your problem may be cache misses, memory bandwidth, architecture that doesn't go well with the algorithm). Point is, you need to specify the task.
- TedShiller 6y agoIt's great to hear that new versions of Dance Dance Revolution are still being developed. I love that game, gives you a great physical workout.
- filereaper 6y agoTo my hardware colleagues on HN, what prevents something similar to Dennard Scaling on DRAMs? My very naive textbook knowledge is that every bit for DRAM uses up a single transistor and a capacitor, whereas a SRAM cell uses up 6 transistors. How is it then that with all the scaling so far that traditional SRAMs haven't caught up with DRAM capacities? A single DRAM chip is huge compared to the total die size of any micro-processor. As the sibling comment asks about cheaper DRAMs, I'm trying to understand how using SRAMs haven't caught up yet from a price/GB perspective.
- verall 6y agoSRAMs are catching up, but they are still much less dense, and are normally configured for smaller line sizes and lower latencies than DRAM. DRAM requires sense amplifiers and capacitors which have scaled both scaled slower than transistors. From a systems perspective, lots of work has gone into hiding DRAM's faults highlighting its strong points, so a system where DRAM is replaced with SRAM will be more expensive but not realize most of the possible benefits without major redesigns of the memory systems. Intel has some xeons with over 70MB of L3 and also released some eDRAM chips to play around with this idea, but notice they used eDRAM to get 128MB of L4 on a consumer chip - SRAM is still very expensive!
- wmf 6y agoDRAM has followed Dennard scaling but that has slowed just as it has for logic. https://semiengineering.com/1xnm-dram-challenges/ https://semiengineering.com/1xnm-dram-challenges/ I don't know why you would expect a 6T SRAM cell to ever be smaller than a 1T DRAM cell given that both of them are scaling. Also, DRAM die sizes appear to be 40-80 sq. mm which is smaller than processors. https://www.semiconductor-digest.com/2019/09/13/dram-nand-and-emerging-memory-technology-trends-and-developments-in-2019/ https://www.semiconductor-digest.com/2019/09/13/dram-nand-an...
- cogman10 6y agoThere are 2 things to keep in mind. First, DRAM and SRAM are more than just the transistors, they are the lines going into each of the transistors carrying the signal. They are also all the control circuitry around those transistors. When you write out, you aren't just involving the 6 transistors to store, but rather a whole host of control transistors. Next up, changes in current on a wire induce current on surrounding lines. This induced current is results in what's known as "cross talk". There are a bunch of methods to combat this, the primary one is to make sure there is enough space between lines to avoid it. This means that while your transistor size may get smaller and smaller, you still have a limit on how close you can place those transistors, otherwise you risk unwanted bit flips. DRAM has a major advantage here simply because it requires fewer lines to control state. That results in a more dense packing of memory. With those two points in mind, there's simply no way for SRAM to ever have the same price/GB or density as DRAM (without the market screwing with prices).
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- tus88 6y agoFinally. This was the key to my new build.
- jtl999 6y agoAlthough this question is more academic in nature, how "difficult" is memory training/initialization compared to DDR4? I recall an active microcontroller needing to calibrate the DRAM on startup for DDD4.
- octoberfranklin 6y agoHooray for FINALLY putting a local DC/DC converter ON THE DIMM so the motherboard can feed it with high-voltage/low-current power instead of low-voltage/high-current. The latter has become increasingly impractical (and noisy!)
- fomine3 6y agoEntirely different memory signal technology like serial transport won't adopted by DDRx memory?