alexforencich

5 ms·

1.
by alexforencich 8mo ago
These things are probably the best bang for your buck right now.
2.
by alexforencich 8mo ago
The ex-Alibaba KU3P boards are available for under $200, although you do need a separate JTAG cable with flying leads to load designs on them. I recommend starting with that. I'm building the next-generation version of Corundum on th
3.
by alexforencich 8mo ago
This is correct, and the result of those streams has been released as corundum-proto here: https://github.com/fpganinja/taxi/tree/master/src/cndm_proto . Note that this simplified design is intende
4.
by alexforencich 8mo ago
I'm using some very cheap (~$200) ex-Alibaba FPGA boards for the initial development of the next-generation version. They have 8 lanes of PCIe gen 3 and two SFP28 capable of operation at 25 Gbps. Honestly that's pretty hard to b
5.
by alexforencich 8mo ago
The plan for corundum-ng is to support 400G, but it will be a while before this is available.
6.
by alexforencich 2y ago
The GPU uses https://github.com/alexforencich/verilog-pcie + the Xilinx PCIe hard IP core. When using the device-independent DMA engine, that library supports both Xilinx and Intel FPGAs.
7.
by alexforencich 2y ago
The GPU uses this: https://github.com/alexforencich/verilog-pcie . And there is an open-source 100G NIC here, including open source 10G/25G MACs: https://github.com/corundum/corundum
8.
by alexforencich 2y ago
It uses https://github.com/alexforencich/verilog-pcie on top of the Xilinx PCIe hard IP core, which provides everything below the transaction layer.
9.
by alexforencich 4y ago
A hammer, perhaps?
10.
by alexforencich 5y ago
https://elixir.bootlin.com/linux/latest/source can be far more helpful than grep for this sort of thing
11.
by alexforencich 7y ago
The graph above that one is totally wrong. The frame overhead graph may be correct, though.
12.
by alexforencich 7y ago
Ah yeah, that's probably true. According to some back of the envelope math, it seems like the distribution should be more like 5%, 1%, 1%, 3%, 50%, 39%, ignoring the first and last size bins.
13.
by alexforencich 7y ago
I think the author may have made a mistake in some of the math. The frame size distribution plots are likely based on the number of frames, not the amount of data contained in said frames. The 1500 byte and other large frames should there
14.
by alexforencich 7y ago
Well, we're planning on porting Corundum to the NetFPGA SUME hardware at some point in the near future. Should be relatively straightforward as the PCIe interface on the Virtex 7 is the same as on the Ultrascale parts. NetFPGA does ha
15.
by alexforencich 7y ago
Netronome cards are a gigantic PITA to program, and they are not capable of the precise timing that we need.
16.
by alexforencich 7y ago
I don't know where the heck that price came from. The cards are more like $1200 new. https://www.cdw.com/product/exablaze-exanic-x10-network-adap...
17.
by alexforencich 7y ago
We have not done anything like that. Presumably that would be an important thing to do if a commercial product is produced at some point.
18.
by alexforencich 7y ago
That's something we joke about quite a bit in the research group - "back to the future!"
19.
by alexforencich 7y ago
Crosstalk is better than 30 dB, and double pass loss between ports is 5-8 dB. The switch is basically cycling through three or four different interconnection patterns that are defined by looped back fiber connections, so the signal has to p
20.
by alexforencich 7y ago
Stradding is an artifact of very wide interfaces. On the Ultrascale+ parts, the PCIe gen 3 x16 interface comes out as a 512 bit wide interface. Every cycle of the 250 MHz PCIe user clock transfers 64 bytes of data. The issue has to do wi
21.
by alexforencich 7y ago
That's part of the research we're doing! Take a look at: https://circuit-switching.sysnet.ucsd.edu/ And: https://arpa-e.energy.gov/sites/default/files/UCSD_Papen_ENL... The current
22.
by alexforencich 7y ago
No free 40G MAC/PHY. Unfortunately, the Xilinx CMAC is 100G only, and the Xilinx soft 40G MAC/PHY is $$$$. I have looked in to building a 40G/100G switchable MAC/PHY, but it's going to be a serious pain in the rear.
23.
by alexforencich 7y ago
There are two hard things in computer science: cache invalidation, naming things, and off-by- one errors.
24.
by alexforencich 7y ago
Yes, I am aware of those. However, the kintex PCIe interface is a bit of a pain as it has a TLP straddling mode that can't be disabled, so it will be some time before it's supported as it will require some significant reworking in
25.
by alexforencich 7y ago
It depends on the programming interface. JTAG is bit serial and rather slow, so it can take quite a while to load a large FPGA via JTAG. However, there are several other interfaces that can be used, including QSPI, dual QSPI, parallel flash
26.
by alexforencich 7y ago
It's still in development at the moment. We'll see about the interface. But there are no plans to implement any segmentation offloads or TOE in Corundum, that will be left up to the network stack. However, scatter/gather D
27.
by alexforencich 7y ago
Mellanox NICs (and basically all commercial NICs) do not do what we want. Software is not precise enough, and is on the wrong side of the NIC hardware queues. The whole point of Corundum is to get control of the hardware transmit schedule
28.
by alexforencich 7y ago
The group web page is here: https://circuit-switching.sysnet.ucsd.edu/ Corundum was originally geared more towards optical circuit switching applications, but it's certainly not limited to that. Since it's open s
29.
by alexforencich 7y ago
Corundum should work on any ultrascale or ultrascale plus FPGA with the necessary interfaces. Probably also virtex 7. We're considering porting to Intel/Altera parts at some point as well...mainly the PCIe interface will need wo
30.
by alexforencich 7y ago
Original motivation is to support optical switching research for datacenter networking applications. The research group web page is here: https://circuit-switching.sysnet.ucsd.edu/ . It is also mentioned in these slides:

More ›