6 ms·
Author misinterpreted specs... "Each packet has 20 bytes of useful payload and consumes 49 μA at 3 V" That is a manufacture average for some profile, mostly s
by leppie 12y ago
Author misinterpreted specs...
"Each packet has 20 bytes of useful payload and consumes 49 μA at 3 V"
That is a manufacture average for some profile, mostly sleeping 99% of the time.
The real consumption during broadcast is in the order of 15-20mA for most chip I have seen.
Here is a very informative article dealing with power demands of low power devices: www.ganssle.com/reports/ultra-low-power-design.html
- MootWoop 12y agoThanks for the link, indeed it looks quite technical and very complete on the subject. Truth be told I'm far from an expert on power, hence the mistake :-)
- Gurkenmaster 12y agoConsidering the 1 minute interval wouldn't it be better for the battery to use a clock implemented in hardware that boots the chip everytime it's needed?
- unwind 12y agoThat is typically what you do, microcontrollers have timers and low-power mode(s) which keep the timers running even though the processor core isn't executing any instructions.
- MootWoop 12y agoI'm not an expert on power optimization, and I don't know how this is done in micro-controllers. But I would think that the hardware clock would be implemented using integrated analog components (capacitor + resistor circuit) rather than digital logic, to avoid repeatedly switching on and off even just a few transistors.
- BostonEnginerd 12y agoThe power needed to keep the analog comparator going will probably be higher than keeping the 32kHz clock running.
- pjc50 12y agoApparently external xtal is marginally best (http://www.microchip.com/forums/m341592.aspx); http://www.microchip.com/forums/m341592.aspx); which makes intuitive sense, given that it's exactly the same scenario as a digital watch. 32khz crystal; driver; counter; comparator. Few hundred tiny transistors. Consumption probably less than battery self-discharge.