9 ms·
Unfortunately, Memory64 comes with a significant performance penalty because the wasm runtime has to check bounds (which wasn't necessary on 32-bit as the runti
by renehsz 1y ago
Unfortunately, Memory64 comes with a significant performance penalty because the wasm runtime has to check bounds (which wasn't necessary on 32-bit as the runtime would simply allocate the full 4GB of address space every time).
But if you really need more than 4GB of memory, then sure, go ahead and use it.
- jsheard 1y agoThe comedy option would be to use the new multi-memory feature to juggle a bunch of 32bit memories instead of a 64bit one, at the cost of your sanity.
- baq 1y agodidn't we call it 'segmented memory' back in DOS days...?
- munificent 1y agoWe call it "pointer compression" now. :)
- mananaysiempre 1y agoSeriously though, I’ve been wondering for a while whether I could build a GCC for x86-64 that would have 32-bit (low 4G) pointers (and no REX prefixes) by default and full 64-bit ones with __far or something. (In this episode of Everything Old Is New Again: the Very Large Memory API[1] from Windows NT for Alpha.) [1] https://devblogs.microsoft.com/oldnewthing/20070801-00/?p=25763 https://devblogs.microsoft.com/oldnewthing/20070801-00/?p=25...
- o11c 1y agoA moderate fraction of the work is already done using: https://gcc.gnu.org/onlinedocs/gcc/Named-Address-Spaces.html https://gcc.gnu.org/onlinedocs/gcc/Named-Address-Spaces.html Unfortunately the obvious `__attribute__((mode(...)))` errors out if anything but the standard pointer-size mode (usually SI or DI) is passed. Or you may be able to do it based on x32, since your far pointers are likely rare enough that you can do them manually. Especially in C++. I'm pretty sure you can just call "foreign" syscalls if you do it carefully.
- dajtxx 1y ago6502 zero page instruction vibes.
- deleted 1y ago[deleted]
- magicalhippo 1y agoIt was glorious I tell you. Especially how you could increase the segment value by one or the offset by 16 and you would address the same memory location. Think of the possibilities! And if you wanted more than 1MB you could just switch memory banks[1] to get access to a different part of memory. Later there was a newfangled alternative[2] where you called some interrupt to swap things around but it wasn't as cool. Though it did allow access to more memory so there was that. Then virtual mode came along and it's all been downhill from there. [1]: https://en.wikipedia.org/wiki/Expanded_memory https://en.wikipedia.org/wiki/Expanded_memory [2]: https://hackaday.com/2025/05/15/remembering-more-memory-xms-and-a-real-hack/ https://hackaday.com/2025/05/15/remembering-more-memory-xms-...
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- mananaysiempre 1y ago> Think of the possibilities! Schulman’s Unauthorized Windows 95 describes a particularly unhinged one: in the hypervisor of Windows/386 (and subsequently 386 Enhanced Mode in Windows 3.0 and 3.1, as well as the only available mode in 3.11, 95, 98, and Me), a driver could dynamically register upcalls for real-mode guests (within reason), all without either exerting control over the guest’s memory map or forcing the guest to do anything except a simple CALL to access it. The secret was that all the far addresses returned by the registration API referred to the exact same byte in memory, a protected-mode-only instruction whose attempted execution would trap into the hypervisor, and the trap handler would determine which upcall was meant by which of the redundant encodings was used. And if that’s not unhinged enough for you: the boot code tried to locate the chosen instruction inside the firmware ROM, because that will have to be mapped into the guest memory map anyway. It did have a fallback if that did not work out, but it usually succeeded. This time, the secret (the knowledge of which will not make you happier, this is your final warning) is that the instruction chosen was ARPL, and the encoding of ARPL r/m16, AX starts with 63 hex, also known as the ASCII code of the lowercase letter C. The absolute madmen put the upcall entry point inside the BIOS copyright string. (Incidentally, the ARPL instruction, “adjust requested privilege level”, is very specific to the 286’s weird don’t-call-it-capability-based segmented architecture... But it’s has a certain cunning to it, like CPU-enforced __user tagging of unprivileged addresses at runtime.)
- malkia 1y agowait.... UNREAL MODE!
- marcosdumay 1y agoAnd turned out we have the transistors to avoid it, but it's a really good optimization for CPUs nowadays. At least most people design non-overlaping segments. And I'm not sure wasm would gain anything from it, being a virtual machine instead of real.
- afiori 1y agoHonestly you could allocate a new memory for every page :-)
- evmar 1y agoIt looks like memories have to be declared up front, and the memcpy instruction takes the memories to copy between as numeric literals. So I guess you can't use it to allocate dynamic buffers. But maybe you could decide memory 0 = heap and memory 1 = pixel data or something like that?
- andrewl-hn 1y agoSomewhat related. At some point around 15 years ago I needed to work with large images in Java, and at least at the time the language used 32-bit integers for array sizes and indices. My image data was about 30 gigs in size, and despite having enough RAM and running a 64-bit OS and JVM I couldn't fit image data into s ingle array. This multi-memory setup reminds me of my array juggling I had to do back then. While intellectually challenging it was not fun at all.
- the_duke 1y agoThe problem with multi-memory (and why it hasn't seen much usage, despite having been supported in many runtimes for years) is that basically no language supports distinct memory spaces. You have to rewrite everything to use WASM intrinsics to work on a specific memory.
- benji-york 1y agoStray thought: the way Zig uses first-class allocators might make it interesting for doing things with multiple memories.
- TrueDuality 1y agoThe irony for me is that it's already slow because of the lack of native 64-bit math. I don't care about the memory space available nearly as much.
- sehugg 1y agoEh? I'm pretty sure it's had 64-bit math for awhile -- i64.add, etc.
- deleted 1y ago[deleted]
- jesse__ 1y agoThey might have meant lack of true 64bit pointers ..? IIRC the chrome wasm runtime used tagged pointers. That comes with an access cost of having to mask off the top bits. I always assumed that was the reason for the 32bit specification in v1
- Findecanor 1y agoActually, runtimes often allocate 8GB of address space because WASM has a [base32 + index32] address mode where the effective address could overflow into the 33rd bit. On x86-64, the start of the linear memory is typically put into one of the two remaining segment registers: GS or FS. Then the code can simply use an address mode such as "GS:[RAX + RCX]" without any additional instructions for addition or bounds-checking.
- zarzavat 1y agoI still don't understand why it's slower to mask to 33 or 34 bit rather than 32. It's all running on 64-bit in the end isn't it? What's so special about 32?
- azakai 1y agoThe special part is the "signal handler trick" that is easy to use for 32-bit pointers. You reserve 4GB of memory - all that 32 bits can address - and mark everything above used memory as trapping. Then you can just do normal reads and writes, and the CPU hardware checks out of bounds. With 64-bit pointers, you can't really reserve all the possible space a pointer might refer to. So you end up doing manual bounds checks.
- deleted 1y ago[deleted]
- kannanvijayan 1y agoHi Alon! It's been a while. Can't bounds checks be avoided in the vast majority of cases? See my reply to nagisa above (https://news.ycombinator.com/item?id=45283102 https://news.ycombinator.com/item?id=45283102). It feels like by using trailing unmapped barrier/guard regions, one should be able to elide almost all bounds checks that occur in the program with a bit of compiler cleverness, and convert them into trap handlers instead.
- azakai 1y agoHi! Yeah, certainly compiler smarts can remove many bounds checks (in particular for small deltas, as you mention), hoist them, and so forth. Maybe even most of them in theory? Still, there are common patterns like pointer-chasing in linked list traversal where you just keep getting an unknown i64 pointer, that you just need to bounds check...
- nagisa 1y agoThat's because with 32-bit addresses the runtime did not need to do any masking at all. It could allocate a 4GiB area of virtual memory, set up page permissions as appropriate and all memory accesses would be hardware checked without any additional work. Well that, and a special SIGSEGV/SIGBUS handler to generate a trap to the embedder. With 64-bit addresses, and the requirements for how invalid memory accesses should work, this is no longer possible. AND-masking does not really allow for producing the necessary traps for invalid accesses. So every one now needs some conditional before to validate that this access is in-bounds. The addresses cannot be trivially offset either as they can wrap-around (and/or accidentally hit some other mapping.)
- fulafel 1y agoBounds checking in other PLT is often reproted to result in pretty low overheads. Will be interesting to see some details about how this turns out.