dist1ll

9 ms·

1.
by dist1ll 8mo ago
Your MS-01 routes line-rate 25Gbps in software with VyOS w/o kernel bypass? That's very surprising to me. At what packet sizes?
2.
by dist1ll 9mo ago
Sorry for the OT response, I was curious about this comment[0] you made a while back. How did you measure memory transfer speed? [0] https://news.ycombinator.com/item?id=38820893
3.
by dist1ll 9mo ago
The Aurora paper [0] goes into detail of correlated failures. > In Aurora, we have chosen a design point of tolerating (a) losing an entire AZ and one additional node (AZ+1) without losing data, and (b) losing an entire AZ without impac
4.
by dist1ll 9mo ago
> "surely if I send request to 5 nodes some of that will land on disk in reasonably near future?" That would be asynchronous replication. But IIUC the author is instead advocating for a distributed log with synchronous quorum
5.
by dist1ll 9mo ago
Is there more detail on the design of the distributed multi-AZ journal? That feels like the meat of the architecture.
6.
by dist1ll 9mo ago
As long as your target language has a strict define-before-use rule and no advanced inference is required you will know the types of expressions, and can perform type-based optimizations. You can also do constant folding and (very rudimenta
7.
by dist1ll 10mo ago
I would argue that stateful services (databases, message queues, CDNs) all perfectly fit the unikernel model. The question is whether the additional engineering effort and system design is worth the performance gain.
8.
by dist1ll 10mo ago
Another one is "jalr x0, imm(x0)", which turns an indirect branch into a direct jump to address "imm" in a single instruction w/o clobbering a register. Pretty neat.
9.
by dist1ll 10mo ago
I do use a combination of newtyped indices + singleton arenas for data structures that only grow (like the AST). But for the IR, being able to remove nodes from the graph is very important. So phantom typing wouldn't work in that case.
10.
by dist1ll 10mo ago
Sure, these days I'm mostly working on a few compilers. Let's say I want to make a fixed-size SSA IR. Each instruction has an opcode and two operands (which are essentially pointers to other instructions). The IR is populated in o
11.
by dist1ll 10mo ago
If that's the case then hats off. What you're describing is definitely not what I've seen in practice. In fact, I don't think I've ever seen a crate or production codebase that documents infallibility of every singl
12.
by dist1ll 10mo ago
For iteration, yes. But there's other cases, like any time you have to deal with lots of linked data structures. If you need high performance, chances are that you'll have to use an index+arena strategy. They're also common i
13.
by dist1ll 10mo ago
> every unwrap in production code needs an INFALLIBILITY comment. clippy::unwrap_used can enforce this. How about indexing into a slice/map/vec? Should every `foo[i]` have an infallibility comment? Because they're essentia
14.
by dist1ll 1y ago
WASM traps on out-of-bounds accesses (including overflow). Masking addresses would hide that.
15.
by dist1ll 1y ago
Ditto. Perfect hashing strings smaller than 8 bytes has been the fastest lookup method in my experience.
16.
by dist1ll 1y ago
> because that is what it means in mathematics Personally, I think this argument only holds water for languages that are rooted in mathematics (e.g. Haskell, Lean, Rocq, F*, ...). If your computational model comes from a place of physica
17.
by dist1ll 1y ago
Intel still does it. As far as I can see they're the only player in town that provide open, detailed documentation for their high-speed NICs [0]. You can actually write a driver for their 100Gb cards from scratch using their datasheet.
18.
by dist1ll 1y ago
> While latency from a conventional CDN is usually < 80ms, with Cloudflare, I have frequently seen it to be in 150-300ms So since magecdn is built on top of Cloudflare, how do they guarantee low latency?
19.
by dist1ll 1y ago
It's fascinating to me how the values and priorities of a project's leaders affect the community and its dominant narrative. I always wondered how it was possible for so many people in the Rust community to share such a strong vie
20.
by dist1ll 1y ago
You can get pretty far with a branch per byte, as long as the bulk of the work is done w/ SIMD (like character classification). But yeah, LUT lookup per byte is not recommended.
21.
by dist1ll 1y ago
OP works for Red Hat, and some of the tests require booting systems with 64k pages. What surprises me more is why Red Hat doesn't provide them with the proper hardware..
22.
by dist1ll 1y ago
Language design can have massive impact on compiler architecture. A language with strict define-before-use and DAG modules has the potential to blow every major compiler out of the water in terms of compile times. ASTs, type checking, code
23.
by dist1ll 1y ago
True. I'm guessing it's the same reason that lexing and parsing are the focus of many langdev guides, despite being amongst the smallest/simplest parts of the compiler. I guess it makes sense, since those topics are the entry
24.
by dist1ll 1y ago
Mostly lobste.rs, since it's more programming focussed than HN.
25.
by dist1ll 2y ago
150k rows/second is pretty ordinary if you do batching, especially for a machine of that size. I was able to get 250k+ row inserts on a 16vCPU on a table with 16 columns, a third of which are strings >30 bytes. Pretty sure you can p
26.
by dist1ll 2y ago
Dealing with references you typically find in a compiler is not a problem for Rust. Arena allocation and indices are your friend.
27.
by dist1ll 2y ago
> 64000x($100+256x$4)=$7,193,600 worst case pricing Not sure how you arrived at this calculation. 256x$4 already accounts for 256GB. The database in the OP is 6400GB large. So shouldn't it be 25x($100+256x$4) = $28100? FWIW in pract
28.
by dist1ll 2y ago
It's possible to build languages that compile faster than Go, with a much more expressive type system. It's just that compile times and DevEx haven't been a priority for most projects.
29.
by dist1ll 2y ago
How do you avoid branches in 64-bit WASM?
30.
by dist1ll 2y ago
Hopefully they don't axe their NICs. At least Intel provides really good open datasheets for their e800 cards, can't say the same about other vendors.

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