victor82

5 ms·

1.
Vial contains a new drug called PAC-3310(twitter.com)
7 points by victor82 9d ago|1 comments
2.
Simple Speech-to-Text on the '10 Cents' CH32V003 Microcontroller(github.com)
141 points by victor82 2y ago|35 comments
3.
Stateless, parallelizable, keyed, random accesible, reversible shuffle algorithm(github.com)
1 points by victor82 3y ago|0 comments
4.
by victor82 3y ago
The solution codes are not available as you can continuously update your solution.
5.
by victor82 3y ago
The solution exposed don't seems competitive enough to solve with good rank the problem exposed here https://highload.fun/tasks/14 That site is really good to play with SIMD code.
6.
by victor82 4y ago
Seems there is not bytearray implemented, can't test further :(
7.
by victor82 4y ago
"but it worked fine before" talks about the observed behavior
8.
by victor82 4y ago
It is not explained why points 31 to 36 are valid, unlike HDL synthesis tools, C compilers are pretty deterministic, same input same output, except timestamps, etc. If an UB adopt X behavior one time, a reproducible build will take same X b
9.
by victor82 4y ago
Location: Santiago, Chile Remote: Yes Willing to relocate: to USA/Singapore/Netherlands/Australia/UAE/Germany Technologies: FPGAs, Verilog, AmaranthHDL, C/C++, Python, Golang Résumé/CV: https://
10.
by victor82 4y ago
Well, that code is module without any context (ie: connected to nothig), it just have 2 inputs (clk and rst), and an "output" with the current sum, after it reach the desired value it keep stuck there (until reset). So as the simu
11.
by victor82 4y ago
You can avoid using abstractions and write it directly on the silicon, it's not really difficult, it turns into a bunch of muxes, registers and adders (as shown in the link below) and solves the problem in just 333 clock cycles, using
12.
by victor82 4y ago
According to golem.de's report, Prodigy has its own VLIW ISA, and Qemu achieves compatibility with the other mentioned ISAs.
13.
Show HN: An easy to build FOSS compilation for work with FPGAs(github.com)
3 points by victor82 4y ago|0 comments
14.
by victor82 5y ago
Location: Chile Remote: Yes Willing to relocate: Could be, depends on the place and project Technologies: C, Golang, Python, VHDL, Verilog, Amaranth HDL, FPGAs Résumé/CV: https://www.linkedin.com/in/vic
15.
SiliconCompiler(docs.siliconcompiler.com)
4 points by victor82 5y ago|0 comments
16.
2021 CWE Most Important Hardware Weaknesses(cwe.mitre.org)
1 points by victor82 5y ago|0 comments
17.
by victor82 5y ago
Thank you for sharing you all digital radio project! It is a nice example of nMigen usage, sadly there are not many ultra-cheap FPGA boards with 5GHz SerDes to try it.
18.
RISC-V is hitting market(hackaday.com)
6 points by victor82 6y ago|2 comments
19.
by victor82 6y ago
Thank you for the write-up, I love the way you use CMBC to construct your algorithm, seem like a way to synthesize code :) Thanks also for point CMBC, I was looking for something like that for years!
20.
by victor82 6y ago
If you are already familiar with Python I could recommend start with this tutorial: https://github.com/RobertBaruch/nmigen-tutorial
21.
by victor82 6y ago
Hi! your application system is kind of flawed, it don't offer you a form nor any chance to include your github link nor respond the questions.
22.
XLS: Accelerated HW Synthesis(google.github.io)
122 points by victor82 6y ago|54 comments
23.
by victor82 6y ago
What exactly you are looking for in Chile?, the applications just say "open application", and don't have the role description.
24.
Turning .NET assemblies into FPGA hardware(github.com)
87 points by victor82 7y ago|42 comments