syntheticgate

9 ms·

1.
by syntheticgate 1y ago
Our thesis is that it's both a hardware and software problem! Which, as steve said, is why we're doing both. We can look at designs across the whole stack, from chips chosen, FPGA implementations, hubris management and contro
2.
by syntheticgate 1y ago
Yes it certainly can be done, but there's a cost and design complexity with doing that too. I did a quick count of gimlet (our server sled's) power rails and got to over 26 different power domains, and I probably missed a few in m
3.
by syntheticgate 1y ago
In Oxide's design, we do have a 54V DC busbar so that's what the rectifiers put out, and runs vertically up and down the back of the rack. The power connection into each of the cubbies for the sleds, and the power into the sidecar
4.
by syntheticgate 1y ago
At a certain point in EE power design you don't really want to go from 54V -> point of load for every rail (1.8V, 1.1V, 0.9V, SVI3 rails etc), so sticking with an intermediate voltage makes sense often even when viewing this from an
5.
by syntheticgate 1y ago
Huge fan of nvc, can't recommend it highly enough! It is fast, has excellent language support and issue response on github is amazingly fast even though this is a hobby project. We're using it every day at work.
6.
by syntheticgate 2y ago
I'll second the Kester recommendation, the stuff is a bit expensive but if you've used bad solder you know it's worth it! I'm using Kester 275 on the bench and have been very happy with it, and as it's a true no-cl
7.
by syntheticgate 2y ago
lol, I'm working on an FMC-FPGA interface at work right now and discovered this same chipselect behavior.
8.
by syntheticgate 2y ago
I believe this is referring to a little board with an STM32G031 part that exposes a PMOD i2c interface and we use it for programming serial numbers into FRUID EEPROMs on the manufacturing line. It runs hubris, can be controlled by humility
9.
by syntheticgate 3y ago
We ship you the whole rack you bought, either to your own on-prem datacenter or your preferred colo partner etc. Once on-site, assuming the infrastructure is already in place, it's ~3hrs to uncrate, connect power and network, and do th
10.
by syntheticgate 3y ago
I'd suggest design complexity has scaled at a faster rate than the autorouting tech. In a closer-to-DC world years ago, optimal routing was nice but often not a requirement. In today's high-speed designs, proper routing can be th
11.
by syntheticgate 3y ago
Not really, at least not apples-apples for something like a Pi. There are a couple of different aspects to this, one is that soft-logic it typically slower than hard-logic so you just can't get comparable frequencies out of a soft impl
12.
by syntheticgate 4y ago
Author here. One thing I really enjoy about this team is that we're trying to avoid silos and build a cohesive team that can flex when needed. As Matt mentioned, a number of the boards discussed are a result of someone jumping in and