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sylefeb
searching Neon…
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1.
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by
sylefeb
10mo ago
Hi there, a while ago I had a ton of fun with the Fomu: https://x.com/sylefeb/status/1571489610647371776 Fantastic little device! Relating to the post, I also happened to brick one erasing the Foboot bootloader by
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sylefeb
2y ago
This is a fascinating topic, especially when considering how this was achieved back in the days. We now take it for granted, but this was not a simple feature to have in your game in 199x ( x<6 ;) ). For anyone interested: I have a detai
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sylefeb
3y ago
Lookup tables are great to produce impressive graphics effects under strict compute limits. I use them in many FPGA projects. On FPGA there is a balance between limited memory (often BRAM) and limited compute, but they can be used to gre
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sylefeb
3y ago
Very, very impressive works, both MRISC32 and FuryGPU (which I just learned about, love the idea of a FPGA-retro-GPU that could go in a modern computer!). It's hard to overstate the amount of passion, care and technical expertise that
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sylefeb
5y ago
Hi (author) - Thanks! I would like to support FIRRTL very much, I have looked into it a bit in the past and that all looks feasible. It is a rather big feature though, so it will take some time. Lua is used as a pre-processor language. This
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sylefeb
5y ago
Hi (author) - for me Silice brings comfort while designing, simplicity of reuse (groups+interfaces making it easy to assemble components), a syntax that is more to my taste (obviously ;) ) and ease of prototyping with the 'control-flow
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sylefeb
5y ago
Hi, Silice author here -- about the license see also discussion here https://news.ycombinator.com/item?id=27575174 and github issue https://github.com/sylefeb/Silice/issues/106
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sylefeb
5y ago
Hi, Silice author here - Yes, exactly! Silice is only a thin abstraction layer over Verilog with a few syntax conveniences (fsms, pipelines, BRAMs, groups, interfaces, please see README ). You can design in Silice in a way similar to Verilo
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sylefeb
5y ago
Thanks for the feedback and pointers, I'll be looking into both issues (AGPL and the question of generated code).
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sylefeb
5y ago
Hi, Silice author here. I picked the AGPL 3.0 knowing it is on the strict side of the spectrum, but not thinking it would be 'toxic'? If you have some pointers on this I'd like to learn more. In particular, I'd like Sil
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sylefeb
5y ago
Hi, Silice author here. I cannot provide a detailed answer as I am not familiar enough with SystemC. I started Silice as a "quality of life" (in the video game sense) thin layer above Verilog, hoping to obtain something that would
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sylefeb
6y ago
Unsure, I definitely would like to have fully working environments that can be explored interactively (with proper BSP collisions, doors/lifts, blinking lights etc). Everything is stored in BRAM, unsure the sprites would fit (maybe a f
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sylefeb
6y ago
Happy to - but in full this will be better explained on release on the github README, with code examples. Also, I am no language expert, and not an FPGA expert either (I have been learning for ~ 1 year). I shape this for my own use, hopping
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sylefeb
6y ago
Doom has had an immediate huge impact in its time ; even before the source code got released the game had a hacker-friendly wibe to it. For instance DEU (the first editor I used) was released in 1994 ( https://doom.fandom.com/
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sylefeb
6y ago
True - I only (partially) re-implemented the render loop, and this is far from the complete game. A game is always much more that its core technical components. Adding a keyboard/joystick input is high on my todo. In terms of moving ar
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sylefeb
6y ago
(Author here) Thanks - and I agree. That being said this is running 100 MHz on (what I believe is) a relatively low end FPGA? Also my implementation remains simplistic, many things to optimize. But this is a very good and deep question: how
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sylefeb
6y ago
Author here - Thanks! You are absolutely correct there are several state machines (vga, sdram controler, framebuffer, texturing, divider, renderer, etc) and each with an active state index. The renderer is the biggest one with 69 states. I