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sdbbp
searching Neon…
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6 ms
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1.
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by
sdbbp
8mo ago
Was there a populist (home) mining fad? People got excited about digging for possible resources and dug crude exploratory tunnels?
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sdbbp
11mo ago
Try some peñas folklóricas.
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sdbbp
1y ago
The people in that list all sound sketchy. Where are the "good guys"?
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sdbbp
2y ago
That's the HDL, and not the inherent design complexity.
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sdbbp
2y ago
Fediverse: https://mastodon.social/@elonjet
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sdbbp
2y ago
See also https://www.cs.cmu.edu/afs/cs/academic/class/15740-f18/www/p... and Gharachorloo's thesis paper.
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sdbbp
2y ago
Probably "A Primer on Memory Consistency and Cache Coherence"
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sdbbp
2y ago
It would be interesting to see this interact with the lower-level ISA memory model work in diy, litmus, etc. Could you validate your ISA memory models against the generated litmus tests in https://www.cl.cam.ac.uk/~pes20&#x
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sdbbp
3y ago
If you like following historical diaries, @samuelpepys is hard to beat.
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sdbbp
3y ago
I used to go to Sundown yearly, a long time ago. I'm not saying it's great, but I did learn to ski there. https://www.sundownmtn.com/the-mountain/snow-report-trail-ma...
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sdbbp
4y ago
Consider a separate architect to design the place with you. They can help find a general contractor to be the "builder", but also serve as an owner's representative to oversee construction intent. They want the design done
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sdbbp
5y ago
This organization of functionality is intentional. It provides support for code modification orthogonal to instruction cache coherency support. The range of types of implementations of RISC-V is broad enough that imposing instruction cach
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sdbbp
5y ago
This in-depth presentation is good: https://www.youtube.com/watch?v=oTaOd8qr53U
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sdbbp
5y ago
Ventana Micro Systems | Software Engineer | San Francisco Area, Pune, Bangalore | ONSITE (except COVID-19) REMOTE (US, possible) VISA | Full Time | http://ventanamicro.com We are a well-funded start-up, founded by seasoned indus
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sdbbp
6y ago
This was clarified this year. I think the author's context is moving from Bare to one of the Sv modes. https://github.com/riscv/riscv-isa-manual/commit/866326d938c...
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sdbbp
6y ago
Ventana Micro Systems | Software or Design Verification Engineer | San Francisco Area, Pune, Bangalore | ONSITE (except COVID-19) REMOTE (US, possible) VISA | Full Time | ventanamicro.com Ventana Micro Systems is a well-funded, early stage
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sdbbp
10y ago
In my experience, writing a formal specification _once_ in TLA+ has shaped my mindset around architecture, implementation, and verification of distributed systems for the last 19 years. It's easier to provide feedback on most informal
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sdbbp
15y ago
There's little open development, so there's little incentive to write up public articles. You could try something like Bob Colwell's "The Pentium Chronicles".
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sdbbp
15y ago
The amount of effort spent on what is generally called "functional verification" is much higher for hardware than for software. Also, the specifications tend to be clearer and the source code size is smaller than you might imagine.
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sdbbp
15y ago
I use greencine.com
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sdbbp
16y ago
Blame San Mateo County for rejecting BART 50 years ago. http://www.bart.gov/about/history/