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s_kanev
searching Neon…
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6 ms
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1.
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by
s_kanev
6y ago
This was the case a few years back when the fastest pools were implemented with recursive data structures (e.g. linked lists for the freelists in gperftools). In the new tcmalloc (and, I think, hoard?) the fastest pools are essentially slab
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by
s_kanev
6y ago
Not OP, but I do (a fair amount of) HPDE/TT with an m240i, converted to the cup car spec. Running costs for me are ~$500 / 2-hour day on 100-TW tires. These cars aren't exactly light, so they eat through consumables. Tires ar
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by
s_kanev
10y ago
Both static and dynamic histograms can be pretty important, actually. Dynamic ones for performance, static ones -- usually for correctness (imagine developing a tool just like QEMU, which needs to emulate each instruction type). Performance
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How Intel lost the mobile market
(extremetech.com)
1 points
by
s_kanev
10y ago
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0 comments
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by
s_kanev
12y ago
I beg to disagree. For instance, it's been running for years sampling Google's fleet [1] (the paper mentions oprofile, but that has been replaced quite a while ago). [1] http://courses.cs.washington.edu/courses
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Meshgrids and disambiguating rows and columns from Cartesian coordinates
(eli.thegreenplace.net)
2 points
by
s_kanev
12y ago
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0 comments
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by
s_kanev
12y ago
Have you seen xed [1]? It seems to fit the bill nicely from what I understand about your requirements. [1] https://software.intel.com/sites/landingpage/pintool/docs/67...
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by
s_kanev
12y ago
My go-to practitioner: Jean-luc Doumont: http://www.principiae.be/X0302.php I highly recommend his talks (he tours universities in the US quite often) -- they are full of small practical nuggets on data presentation.
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by
s_kanev
12y ago
Yeah, cpu idleness is pretty fascinating and, as it turns out, quite important. Shameless plug, I just published a paper [1], showing that if you mess up how deeply you go to sleep in cpuidle, you can loose up to ~15% latency in datacenter
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Anonymity, Privacy, and Big Data
(blogs.law.harvard.edu)
1 points
by
s_kanev
12y ago
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0 comments
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by
s_kanev
13y ago
Ok, should've been more specific -- it doesn't catch any exceptions and lets them bring down the program and have the project maintainer check what they did wrong.
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by
s_kanev
13y ago
OP here. Totally agree. TIL about RAII. That particular codebase doesn't use c++ exceptions, but still not a reason for a roll-your-own solution if something as efficient is in the standard library.
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In the C++ bag of tricks: scoped locks
(blog.skanev.org)
43 points
by
s_kanev
13y ago
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51 comments
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by
s_kanev
13y ago
Spent a few hours trying to look into this. The results so far suggest it has to do with the register renaming mechanism, but not completely conclusive. You can check out my notes here: http://blog.skanev.org/2013/12&#x
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Why (Not) Do a PhD in Computer Science?
(blog.skanev.org)
46 points
by
s_kanev
14y ago
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43 comments
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by
s_kanev
14y ago
For an intro read, Hennessy and Patterson's "Computer Organization and Design" is good. Their other book, "Computer Architecture: A Quantitative Approach" is the de facto bible, but it's slightly more advanced, and not a good first read. An
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by
s_kanev
14y ago
Disclaimer: I was a '12 grad, and currently doing a PhD in CS there. > because some of the faculty just weren't that great I think this is anecdotal evidence against anecdotal evidence. In my case, a lot of the faculty were that great.
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by
s_kanev
14y ago
For such purposes, binary instrumentation is probably a more proper tool. Various options out there, I personally prefer Pin [1] because it's extremely robust and gives you good control of the overheads from instrumenting. edit: grammar [1]
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by
s_kanev
14y ago
http://blog.skanev.org/ -- a weird mix about academia (PhD student in computer architecture), photography (still advanced amateur) and long-distance running (marathoner).
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by
s_kanev
14y ago
These are all valid points for high-level languages in general. One can add easier parametrization to the list (high-performing HDL code can be terrible to reparametrize). I was mostly surprised by the choice of a Haskell-based DSL. I think
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by
s_kanev
14y ago
I'm a bit surprised by the workflow. While I agree that hardware description languages are terrible from a software developer point of view, to me Verilog is typically much more tolerable than VHDL. Also, in the last few years, SystemC has
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by
s_kanev
14y ago
This is not completely true. "Authors and/or their employers shall have the right to post the accepted version of IEEE-copyrighted articles on their own personal servers or the servers of their institutions or employers without permission f
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I'm a Bachelor of Arts. And I Lived to Tell
(blog.skanev.org)
1 points
by
s_kanev
14y ago
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0 comments