rscott2049

7 ms·

1.
by rscott2049 2y ago
Nothing nearly so complex. Here's the code in question: .wrap_target irq set 0 ; Signal end of active packet start: wait 1 pin 2 ; Wait for CR_DV assertion wait 1 pin 0 ; Wait for RX<0> t
2.
by rscott2049 2y ago
I did some further investigating - it's apparently due to not having enough setup time on the RX pio SM. Even though the PIO clocking is fixed at 100 MHz, there are CRC errors at the lower system clocks. I tried changing the delay in t
3.
by rscott2049 2y ago
I expect the RP2350 to perform much better in this scenario! At the minimum, one of the DMA channels should be eliminated, and I'm hoping the CRC calculation will get faster.
4.
by rscott2049 2y ago
Fortunately, the receive ISR isn't cracking packets, just calculating a checksum and passing the packet on to LWIP. I wish there were two DMA sniffers, so that the checksum could be calculated by the DMA engine(s), as that's where
5.
by rscott2049 2y ago
Wish I could answer that! All I can guess is that the slower processing speed creates a bottleneck in the LWIP stack somewhere...
6.
Raspberry Pi Pico does line rate 100M Ethernet(github.com)
237 points by rscott2049 2y ago|65 comments
7.
by rscott2049 2y ago
If anybody is still following this thread, I fixed the problem: sudo ping -f 192.168.1.6 -s 1473 PING 192.168.1.6 (192.168.1.6) 1473(1501) bytes of data. 347751/347752 packets, 0% loss, min/avg/ewma/max = 0.573/0.62
8.
by rscott2049 2y ago
I'm still working on it - hopefully will be on the DECstation2040 github soon. The interface uses the LAN8720/8740 MAC chips, which provide 10/100 Mbit. (I haven't tried 10 Mbit, so no idea if it works or not). FYI, here
9.
by rscott2049 2y ago
Agreed. I re-wrote the Rx PIO routine to do a proper interrupt at EOF, and added a DMA driven ring buffer, which eliminated a lot of the hackiness...
10.
by rscott2049 2y ago
Almost correct - the third implementation does generate the clock, but it isn't necessary to drive the clock directly from the system clock, as there are m/n clock dividers available. I use a 300 MHz system clock, and divide down
11.
by rscott2049 2y ago
I'm assuming you've looked at the pico-rmii-ethernet library? If so, I feel your pain - I've been fixing issues, and am about halfway done. (This is for the DECstation2040 project, available on github). Look for a release in
12.
by rscott2049 2y ago
Maybe you'd like to help me get this over the finish line? I'm looking at a steep learning curve, trying to write a Lance chip emulator. I have been able to get LWIP to run on the DECstation HW. (Though Rev 2.1 does exhibit some p
13.
by rscott2049 2y ago
The DMA Sniffer is part of the RP2040 DMA engine. It can perform a variety of functions on the DMA'd data, including CRCs, accumulation, bit-reversal, etc. I use the accumulation function to increment the address contained in the Hyper
14.
by rscott2049 2y ago
This project wouldn't exist without Dmitry's excellent project! Having an m0+ assembly language MIPs emulator makes all the difference...
15.
by rscott2049 2y ago
Thanks for the follow! The only other social media accout is on Hackaday.io: https://hackaday.io/project/196769-decstation2040