rep_lodsb

5 ms·

1.
by rep_lodsb 3d ago
An interrupt or SYSCALL instruction could do anything, which includes remapping or overwriting the memory location it returns to. So no, these instructions can't be prefetched in any case.
2.
by rep_lodsb 3d ago
#UD has the same stack frame as a software interrupt, there's no error code pushed. But most likely, executing INT 06 from ring 3 will generate a protection fault instead, since the gate descriptor would be set up to not be reachable f
3.
by rep_lodsb 9d ago
g_dwBrainsDestroyedBySlop++;
4.
by rep_lodsb 9d ago
And the Wikipedia article explains where the name came from, a combination of ".stub" and "mrxnet.sys". Not one literal string as it appears several times in this purported "reconstruction". Including as the
5.
by rep_lodsb 9d ago
But then did it hallucinate that registry key? Or this? "instance of ActiveScriptEventConsumer as $Consumer\n" "{\n" " Name = \"StuxnetConsumer\";\n" " Scr
6.
by rep_lodsb 9d ago
This looks like slop, it's all concatenated into a single file and most probably not based on the actual malware. I'm fairly sure that for example the real one does not include the literal string "Stuxnet" anywhere, like
7.
by rep_lodsb 9d ago
Mentioned in the article, same link too. The court documents included a diagram of the microcode format, and also a comparison of the reset sequence between Intel and NEC.
8.
by rep_lodsb 9d ago
This is basically an ELF executable file infecting virus, nothing novel about that.
9.
by rep_lodsb 1mo ago
>Could you teach your CPU to understand RISC-V? The bulk of microcode is still ROM inside the CPU. Also it's mostly used for the more complex instructions, the basic load/store/add/etc. would be decoded and executed m
10.
by rep_lodsb 1mo ago
This requires access to hardware registers, so it won't work as non-root or inside a VM.
11.
by rep_lodsb 2mo ago
Why should AI enthusiasts expect logical reasoning? AI "reasoning" is the model babbling to itself, using statistically likely sequences of words that appear in the training data. Of course that will often produce valid chains of
12.
by rep_lodsb 2mo ago
8080 assembly language makes it easy to understand what the restrictions are. Z80 much less so. Much of the instruction set was carried over from the 8008, that's where you get MOV & ALU operations, the pseudo-register M standing f
13.
by rep_lodsb 3mo ago
And for you that's reason enough not to watch his videos? Fine, but I get the distinct impression you (and other people in your "camp") don't want anyone else to watch his content either, and that's why you're
14.
by rep_lodsb 3mo ago
16-color EGA and VGA had separate bitplanes, so writing 4 monochrome images would take the same time as a single one in color.
15.
by rep_lodsb 3mo ago
That's a limitation of the Turbo C library, as the comment says. DOS memory allocation functions take the size in 16-byte "paragraphs", and return a segment, with the allocated memory starting at offset zero in that segment.
16.
by rep_lodsb 3mo ago
A lot of that is just bloat that you wouldn't have had back then. But it could still be handled by an 8086, not by storing the raw HTML in memory at all, but parsing it as it loads. Each DOM node would be its own object with child poin
17.
by rep_lodsb 4mo ago
Well, one indication is the value loaded into EDX on reset: 9B5 BIST1 -> TMPD 0x0303 PASS2 9B6 SIGMA -> EDX 9B7 BIST2 -> TMPE TMPD XOR 9B8 SIGMA 0x3ddc0c2c XOR 9B9 SI
18.
by rep_lodsb 4mo ago
Maybe websites should work without loading megabytes of scripts from third-party servers? I think that should be disabled unless you opt-in. Also browsers by default using a blocklist from some company, and showing a giant scary warning a
19.
by rep_lodsb 4mo ago
Something like uMatrix should be built right into the browser, and the fact that this isn't the case really says it all about how it's not the "user agent" anymore. It's the one extension that's absolutely esse
20.
by rep_lodsb 4mo ago
Slight correction, the correct offset is 7, and DAA only adds 6. But the trick is also adding the carry bit. This works on the 6502 in decimal mode too, e.g. https://news.ycombinator.com/item?id=6342286 On the Z80 and 8086,
21.
by rep_lodsb 5mo ago
I know this comment will get ignored by the true believers, and likely pasted directly into Claude by the author in order to "further improve" the code, but here's some small excerpts from the terminal emulator (glass.asm, 19
22.
by rep_lodsb 5mo ago
Fun fact: "/dev/nul" (with only one L) would have worked, even if there is no directory with that name. That's been a feature since DOS 2.0, there was even an undocumented option AVAILDEV to make the prefix mandator
23.
by rep_lodsb 5mo ago
Last I checked, it's still mostly unusable, especially on real hardware (both modern and Win2k-era). Not saying this because I have anything against it, that's just a fact. Of course one could say that Windows 11 provides negative
24.
by rep_lodsb 5mo ago
The original code using ROL should have been correct? As I see it, what is needed is a rotation without involving the carry flag, and the fix emulates that by RCL'ing the two bits separately, giving the same effect on the RELOC var
25.
by rep_lodsb 5mo ago
Division by zero is handled the same on x86, and also changed from "trap" to "fault" after the original 8086/8088. And despite what is often said about its variable-length instruction format, skipping over opcodes i
26.
by rep_lodsb 5mo ago
Most of mul/div was implemented in hardware since the 80186 (and the more or less compatible NEC V30 too). The microcode only loaded the operands into internal ALU registers, and did some final adjustment at the end. But it was still d
27.
by rep_lodsb 5mo ago
That's greatly oversimplified, or less generously, just flat out wrong. Win32 programs have always had their own isolated address space. That infamous BSOD is the result of memory protection hardware catching an access to something o
28.
by rep_lodsb 5mo ago
I don't doubt that this specific processor special-cased XOR (regardless of how it was called in the assembly language)! Merely pointing out that where both operations were available, there seems to have been a preference to use SUB in
29.
by rep_lodsb 5mo ago
These two steps usually run in parallel though, with transistors to enable them depending on what operation should be performed.
30.
by rep_lodsb 5mo ago
Some other architectures like PDP-11 and 680x0 had a dedicated "clear register" instruction. It could have been added to x86, even as a group of single-byte opcodes with the register encoded in three bits (as with PUSH, POP, and I

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