random__duck

5 ms·

1.
Open source FPGA: the next frontier is silicon(reddit.com)
2 points by random__duck 7d ago|1 comments
2.
by random__duck 7d ago
Open source FPGA silicon in the wild, and it works.
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by random__duck 1mo ago
> slighly crazy What a lovely euphemism. Signed: someone slightly crazy.
4.
by random__duck 1mo ago
"This time its different".
5.
by random__duck 1mo ago
I wonder if they will be inviting him to the next RISC-V design committee meeting.
6.
by random__duck 1mo ago
Spot on, while reading this post I couldn't help be wonder "but what about the prototypes"?
7.
by random__duck 2mo ago
No AI was used either for the project itself or for the post. I encourage you to look at the code and the git history.
8.
by random__duck 2mo ago
As the designer of "an ethernet connected beacon that counts and never overflows until the heat death of the universe" ( https://talesonthewire.com/projects/until_heat_death_do_us_p... ) I believe you have foun
9.
by random__duck 2mo ago
No AI was used either for the project itself or for the post.
10.
by random__duck 2mo ago
Nice, thanks for posting the link. For the people unfamiliar with the Tiny Tapeout program: everyone that gets a copy of the Tiny Tapeout chip will be getting a copy of all the ASICs on the shuttle.
11.
by random__duck 2mo ago
True, I went over the EDA stack a bit in a previous article here: https://talesonthewire.com/projects/blake2s_hashing_accelera... This used the librelane classic flow, so it's a lot of verilator, yosys, openroad,
12.
by random__duck 2mo ago
You can join multiple Tiny Tapeout tiles (grid squares) together to form bigger projects, which is what I did here. It's actually one of the bigger 4 grid projects. Also how much you can fit really depends on the node the shuttle is ta
13.
by random__duck 2mo ago
Sounds like they could have used you on that team. Bad luck, but it at least you can walk away proud knowing it was not an issue with your technical skills. :)
14.
by random__duck 2mo ago
Well that isn't good new for google's advertising review if this is a trend.
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by random__duck 2mo ago
This is great!
16.
The Cult of the Ultra-Wealthy – Ed Elson and Ed Zitron [audio](youtube.com)
6 points by random__duck 2mo ago|0 comments
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by random__duck 2mo ago
I love this essay so much, it is such on point.
18.
Designing an Ethernet Switch ASIC(essenceia.github.io)
252 points by random__duck 2mo ago|61 comments
19.
The Whispering Earring (2012)(gwern.net)
3 points by random__duck 2mo ago|2 comments
20.
by random__duck 2mo ago
Now this is a future 100 billion dollar industry!
21.
by random__duck 2mo ago
Can I do a "hold my beer" moment ? https://github.com/Essenceia/ethernet_switch_asic
22.
by random__duck 2mo ago
Thanks :) Yeah, the router is defiantly further in the future to, as it additionally requires CPU integration for run the software stack, switches are the first order of business.
23.
by random__duck 2mo ago
Alright I am back from the trenches after having written 1k words and as expected: I did not impress myself.
24.
by random__duck 2mo ago
Haha, nice one. Defiantly all wrong, if hardware design was a religion I might have been excommunicated for this. Deploying the fix now, it should have been "all nighter".
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by random__duck 2mo ago
The animated graphics at the end are really cool, how did you make them ?
26.
by random__duck 2mo ago
Here is my contribution, titled "The human zoo": https://gist.github.com/Essenceia/c54a8d8fe0d693f96fb7c036f2...
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by random__duck 2mo ago
I read your nonfiction entry, my thoughts where somewhere along the line of "well this escalated quickly".
28.
by random__duck 2mo ago
That is a very good point, such a rule would place a huge burden on the organizers.
29.
by random__duck 2mo ago
Next step: open source hardware ASIC for the open router ?
30.
The Most Useless ASIC(essenceia.github.io)
2 points by random__duck 2mo ago|0 comments

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