rafa_rrayes

37 ms·

1. 1.▲
   by rafa_rrayes 8mo ago

   Thank you so much for taking the time to dig into the code and docs, it means so much to me! Here’s the core idea behind how SHDL compiles to C. At compile time, SHDL groups all gates of the same typea together and packs them into uint64_t
2. 2.▲
   by rafa_rrayes 8mo ago

   Not as a native functionality, not yet but it is something I have been wanting to do for a while. I want to make a complete simulation platform with useful tools such as that. For now you can make the python code call the step() function on
3. 3.▲
   by rafa_rrayes 8mo ago

   That is a very interesting idea! Tbh, I have been thinking about something along those lines. I was messing around with gemini 3.0 back when it came out and made this program called Logic Lab ( https://logiclab-227111532364.us-wes
4. 4.▲
   Show HN: SHDL – A minimal hardware description language built from logic gates(github.com)

   48 points by rafa_rrayes 8mo ago|21 comments
5. 5.▲
   by rafa_rrayes 8mo ago

   Emailed!
6. 6.▲
   Show HN: SHDL – A minimal hardware description language built from logic gates(github.com)

   2 points by rafa_rrayes 8mo ago|2 comments