pocak

6 ms·

1.
by pocak 2y ago
There is, it's Druid. Intel announced the first four codenames in 2021. > [...] first generation, based on the Xe HPG microarchitecture, codenamed Alchemist (formerly known as DG2). Intel also revealed the code names of future gener
2.
by pocak 2y ago
In the post about the texture unit, that ROM table for mip level address offsets seems to use quite a bit of space. Have you considered making the mip base addresses a part of the texture spec instead?
3.
by pocak 4y ago
Right, I had the article's bunny test program on my mind, which looks like it has only one pass. In OpenGL, the driver would have to scan the following commands to see if it can discard the depth data. If it doesn't see the depth
4.
by pocak 4y ago
I don't understand why the programs are the same. The partial render store program has to write out both the color and the depth buffer, while the final render store should only write out color and throw away depth.
5.
by pocak 4y ago
That's what I thought, too, until I saw ARM's Hot Chips 2016 slides. Page 24 shows that they write transformed positions to RAM, and later write varyings to RAM. That's for Bifrost, but it's implied Midgard is the same,
6.
by pocak 5y ago
In the article, cost is cpu time, and benefit is file size reduction multiplied by number of times watched.
7.
by pocak 6y ago
Linux allocates page tables lazily, and fills them lazily. The only upfront work is to mark the virtual address range as valid and associated with the file. I'd expect mapping giant files to be fast enough to not need windowing.
8.
by pocak 6y ago
Only one row at a time has voltage applied to it. In one update, the image is scanned out multiple times, so it appears as if all pixels were changing simultaneously (and perhaps they do, if the electrodes have significant capacitance.) Wit
9.
by pocak 6y ago
Took me a while to get past the home screen. I kept clicking 'paint' at the bottom and 'no' at the top.
10.
by pocak 6y ago
Thread migration only costs on the order of 100 microseconds, including the effect of cold caches. If you keep the AVX thread on the big core for at least 100 milliseconds at a time, you only lose ~0.2% performance.
11.
by pocak 6y ago
Migrate back to the little core if the thread hasn't used AVX in a while. Linux already tracks how long ago a task used AVX-512. I assume the same mechanism could be used to track AVX as well. https://git.kernel.org/pub
12.
by pocak 6y ago
It works by applying a low-pass filter on the camera's motion, so a sudden kick turns into a slow, low amplitude bob. Perhaps you just need to increase the smoothing parameter. I found the default of 10 way too low, and needed around 5
13.
by pocak 8y ago
If you give two threads on one core to one VM, the VM could attack the hypervisor. It could have one thread run the TLB probe loop while the other does something that's handled by the hypervisor.
14.
by pocak 8y ago
Are newer Ryzen 1000 series CPUs still made with the B1 die? I thought steppings were for fixing errata, and once a new revision is qualified, the old one is no longer manufactured.
15.
by pocak 8y ago
There's a nine digit number in the middle of the normal URL. You can take a text-only URL and replace the identifier at the end. Shame on them for not making all articles reachable from the text home page, and for not redirecting to t
16.
by pocak 8y ago
If your chips aren't very large, you can fit multiple copies in the reticle. E.g., if the litho machine has a 40mm by 50mm reticle, and you're making a 10mm by 10mm die, you can expose 20 dice at a time. It's usually worth it