napowderly

7 ms·

1.
by napowderly 12d ago
I think the amount of reuse is a big difference. IC tools build on characterized cells with a lot of the rules already encoded. With PCBs, even when you're reusing a reference circuit, you're often manually carrying over the const
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Show HN: EEBench – AI agents design real circuits, graded by physics simulation(eebench.org)
1 points by napowderly 3mo ago|0 comments
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Show HN: Turn your PCB into a Minecraft world(youtube.com)
2 points by napowderly 5mo ago|0 comments
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NONOS: Open-source, privacy-first Sonos alternative that actually sounds good(github.com)
24 points by napowderly 1y ago|3 comments
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by napowderly 1y ago
Above links broken: https://github.com/atopile/packages/blob/main/packages/ti-in... https://github.com/atopile/packages/blob/main/packages/ti-in...
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by napowderly 1y ago
I basically dont write ato code when designing modules any more, claude code + rules file + a few decent examples and an MCP for basic functions like building, finding parts and inspecting library components is able to do a pretty great job
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by napowderly 1y ago
I think there is actually some really neat stuff to be built here. I think layout engineers would love to be able to write down their 'style guide' that is basically a set of parameters modifying the footprint. We would have a &#x
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by napowderly 1y ago
Our vision is not schematic capture, but intent capture. Once you can capture intent it can trickle down to schematics, layout, BOM selection etc. The language is pretty simple at the moment and building out from the 'minimum useful pr
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by napowderly 1y ago
We think both are pretty important. For most people, the ato language should be sufficiently powerful, for module designers we have a python interface that allows for more complex designs. For example the INA228 from TI has a funky addressi
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by napowderly 1y ago
Fair enough! We definitely need a better landing page, we are just coming out of a long period of building, will all be getting some much needed polish soon! Here is one of our more recent demo projects you can check out that shows how a la
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by napowderly 3y ago
For sure, the way I see the component library is ability to capture progress. In the current paradigm how many times have schematics, symbols and footprints been drawn up for common ICs/circuits? I would expect 100s or in some cases ma
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by napowderly 3y ago
In our tool, just give it a part number and it will find and download the footprint and create an ato file for the component. We currently support components on JLC, but eventually plan to build out a pretty substantial library. We will als
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by napowderly 3y ago
Indeed! We do support quite a few parameters for component selection today, but definitely want to add a lot more. I think this opens up some exciting possibilities, for example not needing to explicitly call out a part number for generic c
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by napowderly 3y ago
I am curious to hear that you dont see any value in bringing software workflow to hardware. I found in previous jobs we spent a huge fraction of our time dealing with things like release, version management and reviews. Thanks for your thou
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by napowderly 3y ago
For sure, our goal is to solve the toughest problems in electrical engineering, we are starting with the low hanging fruit. Confident reuse of designs that can be verified and validated before a chip is placed sounds pretty exciting to me!
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by napowderly 3y ago
For sure, we have been pretty focused on the low level part of the language, I think it will be interesting to see how our language evolves as we are able to abstract away more of the low level connectivity and configuration. I think eventu
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by napowderly 3y ago
Indeed, we think the community aspect of this is super important. Being able to reuse high quality work confidently is very nice. Our export is pretty cool already! We build outputs in CI on a server, ready to drag and drop directly into JL
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by napowderly 3y ago
Thanks! We definitely want to get involved on the education side. Currently we are super focused on building out the tool and growing a community around it. We are looking for people to use our tool and give feedback on what works and what
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by napowderly 3y ago
Agreed, we need to flip this.
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by napowderly 3y ago
We had a look at a few options before doing our own. A few thoughts; Building a DSL allows us to keep it really simple to start, we tried using SKIDL ( a very cool python project) and found it was pretty easy to get your self in a weird sp
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by napowderly 3y ago
Thanks! Hope to see you there again this year!
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by napowderly 3y ago
They do have this, its called EasyEDA. In my experience its not as good as kicad and definitely not as good as the 'professional' tools like cadence and altium. Our tool does basically do that though! We have a big library of kica
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by napowderly 3y ago
For fun I did have a play with GPTs doing a little fine tuning on some ato code. Definitely not my domain, but pretty amazing how quickly it kinndaa worked. Our focus at the moment is building out the layer that designers (human or otherwis
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by napowderly 3y ago
For sure, there will always be some 'user' type requirements that we need to build a way to input, for starters it will be something like a lock file with component positions of things you need in a particular spot. I see alot of
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by napowderly 3y ago
Excited to hear it! Our language already captures tolerances and the solver we are building does proper tolerances stackups. You specify the desired output with a tolerance, eg my_regulator.power_out.voltage = 4.75V to 5.25V and we will sol
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by napowderly 3y ago
love it
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by napowderly 3y ago
We have indeed started with the schematic/requirements half of the problem. My experience in industry is there can be much more direct reuse/configuration in schematic as many boards might have similar features. Layout is typicall
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by napowderly 3y ago
Thanks!
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by napowderly 3y ago
yeah I have only really used it for simple python things, its pretty good at that.
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by napowderly 3y ago
Today, poorly. We just do a dumb matching of signal names. I imagine we will do something like add a property to the interfaces on each device.

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