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n7pdx
searching Neon…
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1.
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n7pdx
4y ago
As toxic as Brian Krazinich was, you can’t really blame one person for the problem at Intel. Yes, he and Murthy initiated the layoffs. But then the orders were executed by mid/senior management. They are the ones who have used revie
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n7pdx
4y ago
There’s another side to the Intel 10nm process debacle. Intel designers and architects have relied on a process and manufacturing advantage for years to overwhelm any problems they had. One of the consequences is the death of any kind of
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n7pdx
4y ago
LOL I remember working on Cannonlake A0. The dozen (not plural) parts we got passed sort but all bricked. Turns out the PLL was randomly losing lock due to variation alone. Also the analog designers refused to run timing checks on digita
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n7pdx
4y ago
This will age poorly. Performance king at unconstrained power is utterly irrelevant from a financial point of view, and requires very little engineering effort to boot: shoving amps into a package until it breaks is the job of a junior eng
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n7pdx
4y ago
LOL yeah. He lured a bunch of his old buddies from retirement with fat packages as if those old Intel-lifer hacks had any fresh ideas to contribute. Pat is literally an Intel swamp creature that somehow managed to pass himself off as some
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n7pdx
4y ago
Less cache, much smaller OOO window, AVX-512. E-core is an area play so Intel can score some multi-thread benchmarketing wins on integer heavy code that don’t have larger memory/cache footprints, don’t require much speculative depth,
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n7pdx
4y ago
Bunch of nonsense. The issue is mismanagement and incompetence. Charlie got suckered by Intel management talking points.
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n7pdx
4y ago
Intel fanboys whine about Apple/Intel CPU comparisons, here is their answer. The takeaway from the story: connecting a bunch of shitty chiplets together makes a shitty SoC. Except this time, Intel paid TSMC a buttload of money to make
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n7pdx
4y ago
LOL. Anyone who works in chip design would know much M1/M2 changed the hardware game. It is actually the dabbler enthusiast talking about how power/perf isn’t important because his LED-laden shitbox has a wall plug (muh absolute
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n7pdx
4y ago
They know it matters, they just don’t have the competence to do it since they promoted a bunch of toadies and charlatans into their technical leadership, and also outsourced a ton of technical work to “low cost geo” so managers can brag abo
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n7pdx
4y ago
It isn’t. TSMC has multiple customers lined up with the volume required to ramp these processes to high volume, Intel only has their own designs and whatever foundry customers willing to be an Intel guinea pig. TSMC also has extensive expe
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n7pdx
4y ago
Trusting Intel to be the torch bearer of Western semiconductor manufacturing is a grievous mistake to begin with. Intel is crippled with incompetence and corruption, government money only contributes to the dysfunction.
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n7pdx
4y ago
My org lost a few people to Intel. They all did their research and know full well the technical and managerial leadership at Intel are total clowns and that Intel is finished. So they are going to rest and vest. They all know Intel is fin
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n7pdx
4y ago
Looks bad. I have two examples to go with: - The Sapphire Rapids validation catastrophe proves they haven’t learned a damn thing about high quality first silicon even after all these years of getting their asses handed to them by AMD/
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n7pdx
4y ago
lol this will age well. i remember designing CPUs at intel when they had like a ~2.5 gen process lead (literally 4-5 years) and the result was still barely better than competition. what outsiders don’t realize is intel management never had
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n7pdx
4y ago
You are completely over-complicating things. P6 derivatives stuck with “traditional” Tomasulo algorithm for way too long. Everyone else moved to pointers for arch regs long before Intel did: MIPS 10k, DEC, AMD, Intel P4, etc, it isn’t rea
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n7pdx
4y ago
No, it wasn’t. Sandybridge started with the Nehalem code base. I was there when it happened.
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n7pdx
4y ago
Yeah, they are done. Worked there for 15+ years in the CPU design org. The total collapse of the technical cadre in the 2010s will be studied in business schools as a case study of how to destroy a tech company from within even as they fa
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n7pdx
4y ago
And when it doesn’t, will you apologize for calling everyone else a fanboy because they don’t buy into your excuses? Go compare the perf/power curves of the alder-lake cores (both P/E) versus the last-gen Apple cores from TSMC n7+
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n7pdx
4y ago
LOL yeah. More powerful, i.e. it consumes more power. Fun fact: the M1 big core caps itself around the same wattage where most Intel SKU consider the core to be below stock wattage. As in, in order to achieve your “more powerful” claim,
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n7pdx
4y ago
"Dunno why every comment implies there's some design gap that leads to M1 or AMD being more powerful or efficient." That is because there is a huge design gap. Intel architecture and design teams have always assumed on the i
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n7pdx
4y ago
Will give him less than two years. High level individual contributors like him are absolute poison to the Intel bureaucracy.
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n7pdx
4y ago
Because Intel is too incompetent to design a CPU that can perform at 1 watt, which is what it takes to run 4 cores in a fanless chassis.
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n7pdx
5y ago
Even if you ignore the software world which has been easily outpacing hardware compensation for the last decade, if you only look at hardware companies, Intel has been either at or very close to the bottom of the pay scale until very recent
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n7pdx
5y ago
Yeah agreed. I was there through the high point, through when the company committed suicide and finally resigned when the corpse started to stink publicly. Blaming everything on the bean-counters is entirely misleading. One of these days t
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n7pdx
5y ago
Intel is not going to beat anyone else in architecture or design in any compute system besides x86. They don't have the experience, the talent, or the culture to do so. Heck, Intel can't even beat AMD in x86 power/perf. So
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n7pdx
5y ago
"Intel claims Intel is faster"
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n7pdx
5y ago
"where did it all go wrong?" Mostly incompetence.
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n7pdx
5y ago
It is quite a bit more than parity to slightly ahead. From 130nm to 22nm the Intel process advantage was enormous. That the horrible P4 architecture was able to compete and be cost-effective is testament to that. Intel architects and des
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n7pdx
5y ago
That is the only way Intel can put up some half decent MT benchmark numbers without blowing out the die cost, since Intel’s P core is way too big and power hungry for the amount of performance it dishes out. On an ultraportable the power c
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