lkcl

7 ms·

1.
by lkcl 5y ago
yes. it is however a test ASIC. therefore it has no on-board boot ROM, and has to have programs uploaded to it over JTAG.
2.
by lkcl 5y ago
we use nmigen (python-based OO HDL) which through yosys generates verilog as an automatic step. 180nm is still by far and above the world's most heavily-used geometry, because the price-performance (bang per buck, however you want to p
3.
by lkcl 5y ago
thx phndrenad2. funny i just searched "chisel gpu" and found two: https://github.com/jbush001/ChiselGPU https://github.com/Chlorophytus/broccoli half-float we'd like to do by using
4.
by lkcl 5y ago
you can get a pretty good idea right now, the simulator is functional and the unit tests include explanations in english: https://git.libre-soc.org/?p=openpower-isa.git;a=tree;f=src/... i'm currently in the middle
5.
by lkcl 5y ago
yes, so the "normal" way that GPUs work is: the architecture and the ISA are so staggeringly optimised they're completely incompatible and incapable of running standard (general-purpose) workloads. no MMU, vast wide SIMD engi
6.
by lkcl 5y ago
they both have the same connections on the outside (they both have the same "netlist") and you can use the exact same SPICE model (a transistor-level simulation) but usually they're entirely empty inside. so the VLSI tool can
7.
by lkcl 5y ago
we'll be going as far as is practical and pragmatic with the actual hardware, and still actually meet user-expectations. firmware, bootloader, OS, drivers, BIOS: definitely.
8.
by lkcl 5y ago
> Also, as your webpage states, you signed TSMC's NDA: FALSE. again. i do not work for LIP6. i do not work for Chips4Makers. i am an independent *LIBRE* Developer. i have NEVVERRRR signed a Foundry NDA and, having a background
9.
by lkcl 5y ago
you'll be fascinated to know that we picked a python-based (Object-Orientated) HDL - nmigen - for exactly this reason. we've developed a dynamically SIMD-partitionable-maskable set of "base primitives" for example, so
10.
by lkcl 5y ago
yehyeh, or you bought a winmodem over 15 years ago, someone told you "hey you have to upgrade to windows 10", it downloads over your 56k Dialup winmodem, reboots... and... no drivers. yes this really happens: ThinkPenguin stock T
11.
by lkcl 5y ago
ultimately what we'd like to see is entirely NDA-free PDKs even for 12nm and below, and you can run the VLSI tools and generate the EXACT GDS-II yourself, then yes, de-cap the processor and do a digital comparison. before you even ge
12.
by lkcl 5y ago
thanks :)
13.
by lkcl 5y ago
no, it's pretty basic, and implicit: it's the (newly-created) "Scalar Fixed-Point Compliancy Subset) - i added a bit to the wikipedia page last month about them https://en.wikipedia.org/wiki/Power_ISA#Com
14.
by lkcl 5y ago
we used an entirely Libre-licensed VLSI "compiler", which takes HDL as input and spits out fully-completed GDS-II Files. the problem with this particular irate individual is that he's assumed that because TSMC's DRC rule
15.
by lkcl 5y ago
HDL source code: https://git.libre-soc.org/?p=soc.git;a=summary Coriolis2 source code: http://coriolis.lip6.fr/ Chips4Makers FlexLib Cell Library based on FreePDK45: https://gitlab.com/Chips
16.
by lkcl 5y ago
> The POWER/PowerPC ISA is still widely used in safety-critical avionics and in the Mars Rover, which is a radiation-hardened 133mhz 32-bit Power ISA system.
17.
by lkcl 5y ago
yes, Chips4Makers http://chips4makers.io will help anyone who wants to do a 360nm ASIC, the costs are ridiculously cheap. like... EUR 1750 for 20 MPW samples, something mad, who would have ever thought it. Staf will also "p
18.
by lkcl 5y ago
interestingly, Libre-SOC and NLnet's funding pre-dates the google-sponsored Skywater 130nm process. also, because it's funded by NLnet we're not dependent on google, don't have to pass "conditions", and in p
19.
Libre-SoC 180nm Power ISA v3.0 ASIC Submitted to IMEC MPW(openpowerfoundation.org)
91 points by lkcl 5y ago|67 comments
20.
by lkcl 5y ago
"Attests the software version is the version that is valid and shipped by the Oxide Computer Company" this makes "Oxide Computer Company" the primary target and point of vulnerability in multiple ways. 1) rogue employees
21.
by lkcl 6y ago
this is what we're doing in Libre-SOC, and using standard python software engineering practices (writing unit tests at every step of the way) to do it. some of those unit tests are actually Formal Correctness Proofs (asserts, but for
22.
by lkcl 6y ago
unfortunately the data still has to be in a full 32BPP framebuffer (in order for 2D or 3D Window Managers to write to it). all the graphics software will write at that full 32BPP rate: it is unfortunately not reasonable to expect all Graphi
23.
by lkcl 6y ago
yes. HDCP has "infected" HDMI, eDP, USB-C and so on. this can entirely be avoided with: * TFP410a (RGBTTL to DVI/HDMI) * SN75LVDS83b (RGBTTL to LVDS) * SSD2828 (RGBTTL to MIPI) * various other converter ICs 4k btw is MENTAL
24.
by lkcl 6y ago
Jeff's evaluation of GPLGPU is fascinating: https://jbush001.github.io/2016/07/24/gplgpu-walkthrough.htm... you are absolutely correct in that everything has moved on from "Fixed Function" of S
25.
by lkcl 6y ago
allo jeff nice to see you're around :) thank you so much for the time you spend guiding me through nyuzi. also for explaining the value of the metric "pixels / clock" as a measure for iteratively being able to focus on
26.
by lkcl 6y ago
this is unfortunately not true (that the RISC-V ISA was designed not to require currently-valid patents). people may believe that to be the case, but it's not. from 3rd hand i've heard that IBM has absolutely tons of patents t
27.
by lkcl 6y ago
if it were done, say, as a Libre/Open processor, say, with the backing of NLnet (a Charitable Foundation), where the "Bad PR ju-ju" for trying it on was simply not worth the effort if it were done. say, as a Libre/Open p
28.
by lkcl 6y ago
this is easy to chuck together in a few days, literally, from pre-existing components found on the internet. * litex (choose any one of the available cores) * richard herveille's excellent rgb_ttl / VGA HDL https://gi
29.
by lkcl 6y ago
unfortunately, if you make modifications and you want them to be "upstreamed" (using libre/open project terminology as an alonogy) you cannot do that without participating in the RISC-V Foundation. you can implement APPROVED
30.
by lkcl 6y ago
only if the patent holder does not create an "improvement" on the old one. then the older (referenced) patent is extended. Bosch have done this specifically so that they can hold on to the original CAN Bus patent.

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