diamondlovesyou

8 ms·

1.
by diamondlovesyou 2mo ago
Not if you can't prove anti-aliasing properties, which wasm doesn't carry.
2.
by diamondlovesyou 3mo ago
> Now why can't compilers do this sort of thing automatically? They do - they just can't assume GFNI instructions are present unless you explicitly say so: https://godbolt.org/z/eYasbKsse
3.
by diamondlovesyou 4mo ago
That won't be located on the stack either. The underlying buffer will be a TU local - ie static and not rx
4.
by diamondlovesyou 5mo ago
> This post makes it seem like the pass ordering problem is bigger than it really is and then overestimates the extent to which egraphs solve it. It isn't so much for SoTA implementations like LLVM, but it is for HL IRs like those p
5.
by diamondlovesyou 1y ago
I don't use credit cards for the credit; in fact mine are completely paid for every statement. They are used for the customer protections and other provided "free" benefits. If some scummy or outright scam-y thing is charged
6.
by diamondlovesyou 1y ago
Less area means less sources of interference for others (this property is also true in the other direction). So the attenuation reduces the signal area, and stronger attenuation lets the transmitter be "strong" in the house withou
7.
by diamondlovesyou 2y ago
> Why is cooperation unlikely? AFAIK it’s not too hard to make a compiler support a function attribute that says “do not optimize this function at all” Compilers like Clang actually generate terrible code; it's expected that a suffi
8.
by diamondlovesyou 3y ago
GB6 will use the Zen4's AVX512, which Zen2 doesn't support.
9.
by diamondlovesyou 3y ago
Fast is relative here. These are microcoded instructions, which are generally terrible for latency: microcoded instructions don't get branch prediction benefits, nor OoO benefits (they lock the FE/scheduler while running). Small m
10.
by diamondlovesyou 3y ago
AMD's string store is not like Intel's. Generally, you don't want to use it until you are past the CPU's L2 size (L3 is a victim cache), making ~2k WAY too small. Once past that point, it's profitable to use string
11.
by diamondlovesyou 3y ago
I have been very happy with my Minisforum Venus UM790, though I use it as a mobile computer since I can just throw it into my backpack. It's been great to have access to AVX512 on the go.
12.
by diamondlovesyou 3y ago
> It is not a language flaw. C++ requires types to be complete when defining them because it needs to have access to their internal structure and layout to be in a position to apply all the optimizations that C++ is renowned for. Knowing
13.
by diamondlovesyou 3y ago
The power of the optimizations available to C++ are what make it so fast (see how slow debug mode is vs -O2/etc), and what allow C++ to be fast in the face of common/easy-to-understand, but technically perf-hostile, patterns. Bit
14.
by diamondlovesyou 3y ago
https://archive.li/ZN5MJ
15.
by diamondlovesyou 3y ago
CISC vs RISC doesn't matter. An ISA should ideally be a healthy mixture of both (citation needed). Arm64 allows memory operands, "just" like x86; but it still has code size issues. Memory operands (ie having a bit of address
16.
by diamondlovesyou 4y ago
Sadly, nobody can run from memory management.
17.
by diamondlovesyou 4y ago
> Like almost any thorny military problem of the 1950s, the solution was the application of nuclear bombs. Magnificent.
18.
by diamondlovesyou 4y ago
I don't think scalable vectors is particularly useful feature, especially compared to what compilers have to go though to support it. It's much more useful to be able to do "more powerful" things with existing vector wid
19.
by diamondlovesyou 4y ago
Add a period to the end of the sentence and aberration is gone. "맙소사, 절대평화주의자들도 가끔 존재 자체가 고통이라 해도 남에게 해를 끼치는 행동을 하는 것 같아요."
20.
by diamondlovesyou 4y ago
See AMD "Smart Memory" a.k.a. PCIe Large Bar. This expands the amount of GPU memory that the CPU can directly access, usually to the GPU's entire memory range (ordinarily only ~256Mb is accessible). GPU->CPU Reads have ver
21.
by diamondlovesyou 4y ago
> By the time of the second gulf war, the F-14D cost 20% more per unit than the F-18E, and some 80-100% more to maintain. I'm not sure how you're concluding that the taxpayers were ripped off by that. He/she isn't con
22.
by diamondlovesyou 4y ago
Naw, just use {pointer, length} tuples. Crisis averted.
23.
by diamondlovesyou 4y ago
GB4/5 are... not a particularly high quality codebases. I can't offer anything more than that, but, well, lets just say that GB4/5 is my least favorite benchmark as a compiler engineer for AMD. It shouldn't be given much
24.
by diamondlovesyou 4y ago
HBM GPUs are better off because the memory cores are in the same package as the compute cores. So they get the same amount of cooling love as the compute cores enjoy. At least in theory.
25.
by diamondlovesyou 4y ago
> But if you get it a little too close together, it goes boom. It won't go boom. One of the difficulties (of many) of the Manhattan project was that it was really really difficult to get fissile material together fast enough to
26.
by diamondlovesyou 4y ago
If P=NP, it only going to be possible because of vectorizing/vectorization.
27.
by diamondlovesyou 4y ago
Artificial sweeteners don't taste like sugar, at least none that I've tried. They're sweet, but it ain't sugar.
28.
by diamondlovesyou 4y ago
Halo: Combat Evolved was originally a Mac game, before MS bought Bungie. Bungie's earlier games were released on Mac first (and maybe only; I don't recall). Myst was a Mac only game for a few years after its release in 1993.
29.
by diamondlovesyou 5y ago
There isn't exactly a large market for homes at that price point. Plus at that price, a thorough DD is an order. So not unexpected that your home's value would be accurate.
30.
by diamondlovesyou 5y ago
This article focuses on loop vectorization, but another important area in this realm is vectorizing "straight-line code", sometimes called SLP vectorization. This sort of code often lives in loops too, and so usually also depends

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