bunnie

6 ms·

1.
by bunnie 2mo ago
UV doesn't have sufficient penetration depth to cause a lot of trouble for the chip. Of course at some intensity, any kind of light becomes problematic but for any exposure level that doesn't also cause eye damage it's not
2.
by bunnie 4mo ago
Just another +1 for fastmail, long time user, really pleased with the service. They do one thing and they do it well, and they charge a fair price for the value delivered.
3.
by bunnie 4mo ago
Actually this chip does have ECC on many of the SRAMs - hence the bit widths of 36 bits instead of 32 in many cases. If it's a concern that the ECC is being used as storage, I'd suggest a laser glitch on the SRAMs to confirm the d
4.
by bunnie 4mo ago
I've run power for a 100-person theme camp in the past. According to the logs, we burned an average of 36.8 gallons per day, or 1.4 liters/person/day (we ran the generator for 9 days total) in 2025. The camp has air condition
5.
by bunnie 5mo ago
Anecdotally, from when I did first amendment activism, my lawyers would always recommend that I stick to doing it with dead tree editions as much as possible. Literal book banning and/or burning has direct judicial precedent that is ha
6.
by bunnie 6mo ago
The core ID definitely didn't need to be in a register, but the elapsed clocks since reset is actually really handy. Having this in the hot path allows me to build a captouch sensor using the BIO, because the clock increment is 1.42ns
7.
by bunnie 6mo ago
Yah, it is - the text is first posted to the campaign, and then copied to my blog for long-term archival in a domain that I control, sans the sales pitch.
8.
by bunnie 6mo ago
It's hard to know for sure, because we don't have access to the PIO's implementation, but I suspect that the PIO is "not small". That being said - size isn't everything. At these small geometries you have gates
9.
by bunnie 6mo ago
I suspect there are tricks to get higher rates, for sure. And hopefully once we see a library of applications forming, we can make informed decisions about what extensions and features would be necessary to enable the next level of I/O
10.
by bunnie 6mo ago
USB 12Mbps is one of the envisioned core use cases - the Baochip doesn't have a host USB interface, so being able to emulate a full-speed USB host with a BIO core opens the possibility of things like having a keyboard that you can plug
11.
by bunnie 6mo ago
FIFO is 8-deep. I did fail to mention that explicitly in the article, I think. The depth is so automatic to me that I forget other people don't know it. The deadlock possibilities with the FIFO are real. It is possible to check the &qu
12.
by bunnie 6mo ago
Correct, actually most programs I've written for the BIO are in assembly. The C compiler support is a relatively recent addition, mostly to showcase the possibilities of doing high-level protocol offloading into the BIO, and the toolin
13.
by bunnie 6mo ago
If there's a single rising edge on the bus that you can use as quantum trigger, then, the reads turn into as series of moves into a FIFO, and the response can be quite fast. The quantum-trigger-on-GPIO was provided to solve exactly the
14.
by bunnie 6mo ago
It depends a lot upon where the processing is happening. For example, you could do something where all the data is pre-processed and you're just blasting bits into a GPIO register with a pair of move instructions. In which case you cou
15.
by bunnie 6mo ago
As a side note about speed comparisons - please keep in mind the faster speeds cited for the PIO are achieved through overclocking. The BIO should also be able to overclock. It won't overclock as well as the PIO, for sure - the PIO sto
16.
by bunnie 6mo ago
Agreed! The PIO is great at what it does. I drew a lot of inspiration from it.
17.
by bunnie 6mo ago
The idea of the wait-to-quantum register is that it gets you out of cycle-counting hell at the expense of sacrificing a few cycles as rounding errors. But yes, for maximum performance you would be back to cycle counting. That being said - o
18.
by bunnie 6mo ago
Actually, the PIO does what it does very well! There is no "worse" or "better" - just different. Because it does what it does so well, I use the PIO as the design study comparison point. This requires taking a critical v
19.
by bunnie 6mo ago
Hello again HN, I'm bunnie! Unfortunately, time zones strike again...I'll check back when I can, and respond to your questions.
20.
by bunnie 6mo ago
To clarify - RISC-V is an architecture, and that is an open specification. However, as an architecture it only specifies things like, what the instructions are and their encodings. It doesn't actually give you a CPU that does anything,
21.
by bunnie 6mo ago
Hmm...it's not just the speed. Actually, the I/O pads themselves are closed source because there's a lot of process magic in them - from the ring seals to the ESD protection, the foundries consider these to be part of what
22.
by bunnie 6mo ago
thank you~~
23.
by bunnie 6mo ago
I imagine sel4 could be possible, but I haven't done any specific checking for compatibility. Current draw - depends on the operating mode, etc. A dabao board with all its regulators and overhead draws around 30mA @ 5V. The CPU in &quo
24.
by bunnie 6mo ago
It all depends on the node. Masks in 130nm are maybe in the $10k's-$100k's range. Masks for the latest TSMC nodes might cost you $30-40 million per set. The masks are pretty much a modern marvel in their own right - I'd wager
25.
by bunnie 6mo ago
There's actually a whole space of shared-mask tapeouts. You might have heard of TinyTapeout [1]/LibreLane [2] and the general concept of "MPW" masks - multi-project wafer masks. These effectively share cost among hundred
26.
by bunnie 6mo ago
In the space of possibilities this can be abstractly thought of as a Caravell [1] harness gone wild. But if you had to price access to the project in a commercial sense, then, the pricing is going to be quite high. Because it's not jus
27.
by bunnie 6mo ago
Thank you for sharing! Comments like this make all the effort worthwhile. <3
28.
by bunnie 6mo ago
<3 makes all the effort worth it to hear stories like this. Thanks for sharing!
29.
by bunnie 6mo ago
Crossbar is unusual to start with in that they wanted to do open RTL - so for starters, there's to a first order no companies even willing to discuss open RTL designs. Beyond that - mainly risk. I had to pinky swear that whatever I add
30.
by bunnie 6mo ago
In general, things that are not strictly digital (PHYs, regulators, PLLs, ADCs) contain significant amounts of foundry IP that would be hard to release as open source. But also, some parts of the chip, for example the AXI bus fabric, were l

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