bippingchip

9 ms·

1.
by bippingchip 2y ago
Same here. What’s this about? Anyone who can see willing to share some more info?
2.
by bippingchip 3y ago
These gate and metal pitch numbers don’t tell the whole story. In the end it’s logic gate density that counts. And while decreasing the gate and metal pitch, also the logic gates have shrunk to be smaller (typically expressed by measuring t
3.
by bippingchip 3y ago
This looks like a treasure trove on what it takes in terms of algorithms to enable tools like Cadence Innovus or Synopsys ICC. It’s not a user guide on how to use these tools, but rather a perk behind the curtain. I’ve worked with Andrew, o
4.
by bippingchip 3y ago
Thank you for the write up! Very enlightening to see how things went for you. I was on the fence recently whether to go for contractor work but ended up just switching companies in the end. In part because I didn’t know what to expect. Art
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by bippingchip 3y ago
Thank you! For now I am just binding c++ to Python but I expect/fear the lines might start blurring, so cython might come in handy then.
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by bippingchip 3y ago
Thank you! - I’ll give pybind11 a go.
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by bippingchip 3y ago
Thank you! Swig indeed can be a pain but having used it before I have become somewhat blind to it. But eg smart pointers are not easy to deal with well, I’ve found out recently… I’ll have a look at pybind11. I’ve worked on Cython codebases
8.
by bippingchip 3y ago
This is a somewhat tangential question to the new release, but there might be folks here that can answer this question. Having used swig to create Python bindings for C++ code over 10 years ago, what’s the recommended way to do this in 2023
9.
by bippingchip 3y ago
If you just need a nice print: fmtlib is a really nice c++23 style implementation without needing c++23 compiler support. Highly recommend it. It’s simple. It’s fast.
10.
by bippingchip 3y ago
Not really knowing Vercel, I thought, based on the title, that it might have been a new GPU competitor (accelerator card) but it’s a startup accelerator.
11.
by bippingchip 3y ago
While I have no need for its online functionality and the SAAS part of plotly, I really do like plotly python + cufflinks [1]. It lets you make interactive plots in html/js format. Which means you can save the notebook as html, and whi
12.
by bippingchip 3y ago
I was wondering what the goal of the project is. The README is not very clear on it, but the implementation document [1] does state design goals: - Small memory usage within a fixed-sized memory region — no mallocs - Practical for small scr
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by bippingchip 3y ago
A lot of companies are indeed trying to build AI accelerator cards, but I would not necessarily call them ASICs in the narrow sense of the word, they are by necessity always quite programmable and flexible: NN workloads characteristics chan
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by bippingchip 3y ago
+1 for UTM. I use it to run an arm Linux distro that uses Rosetta for x86 binary only programs. Works like a charm and blazingly fast!
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by bippingchip 3y ago
The article overlooks a fundamental side of the social contract that is at least equally, if not more, important: how much time and effort (not money) do personally invest to spend time with your friends. In my view, it's only awkward
16.
by bippingchip 3y ago
Oh these are nice. They are the modern equivalent, in a way, of the industrial photos of Bernd and Hill Becher [1], who with and archivist's diligence sought out, cataloged and captured industrial sites (often now long decommissioned a
17.
by bippingchip 3y ago
Also a gothamchess viewer I see :) Levy's indeed always making a sport of it to have the most clickbaity titles and thumbnails, but the chess content is really really top notch. (especially for low ELO players like myself)
18.
by bippingchip 3y ago
I 100% agree on verilator. It’s by far the most efficient tool for many simulation and verification needs. Hands down. Even more so if you are building CPUs UVM definitely has its place still in verification flows. It for something as comp
19.
by bippingchip 3y ago
The package is the new pcb. But it’s going to be a chaotic gold rush with many competing solutions for a while, before a de facto standard will emerge (the way it usually goes). Will it be UCIe, or something else? What will change when peop
20.
by bippingchip 3y ago
Yes I ran into the same thing - It's disappointing, though maybe understandable as this is an iteration on the Primephonic app they acquired a while ago. And though I cannot find any reference to it anymore, if memory serves right, tha
21.
by bippingchip 3y ago
But don't underestimate how much 'middleware' there is in Cuda/CuDNN, NCCL etc. A lot of it is not in the compiler, but much more in hand crafted, carefully optimised libraries. As an example: there are so many low level
22.
by bippingchip 3y ago
Very nice explanation! It gets very complex very quickly... And then there's of course also the fact you never know if your last bytes in the Ifetch you get from the cache is a full instruction or not. You'll need to keep that aro
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by bippingchip 4y ago
Apart from the fact that people might not want it, even technically you might still have latency issues, our eyes are extremely sensitive… also keep in mind: the sensors and displays you need on head might still weigh a lot and consume a lo
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by bippingchip 4y ago
As one of the comments on reddit posts - it's not just big tech companies, but also entire university teams which feel the goalposts moving miles ahead all of a sudden. Imagine working on your PhD on chat bots since start of 2022. Your
25.
by bippingchip 4y ago
This is really interesting, thank you for the reference! Having worked more with images based NN than language models before, I wonder: are LLM inherently more suited to aggressive quantisation, due to their very large size? I see people su
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by bippingchip 4y ago
There’s a (short) list of countries where loot boxes are illegal [1]. Japan is on that list as well, though I think the Mario Kart micro transactions and gambling like mechanisms are still legal. Belgium probably has one of the strictest la
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by bippingchip 4y ago
I had the exact same question. I do like this - it's nice and ambitious to build something like this from the ground up. Looking at the todo list though, they still have quite some work to get to parity with qemu...
28.
by bippingchip 4y ago
The RISC-V isa is specifically designed to be nice and regular and easy to decode, and work with, which definitely shows here (also in the RTL code if you look at some of the well designed RISC-V cores) Of course, bot x86 and Arm started li
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by bippingchip 4y ago
There are 2 main difference between many university (and even the much larger dedicated research lab/fabs like for example in Albany/NY Creates): - Research labs are typically equipped to focus on critical parts of the overal prod
30.
by bippingchip 4y ago
e-beam litho is anything but fast though: the machines are cheaper but they are much much slower in wafer throughput than the insanely expensive ASML EUV machines. Now the website claims a fast fab, but leaves it open what that means: fast

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