PfhorSlayer

6 ms·

1.
by PfhorSlayer 2y ago
The problem with doing that is it would require significantly more space in that spec. At a minimum, one offset for each possible mip level. That data needs to be moved around the GPU internally quite a bit, crossing clock domains and every
2.
by PfhorSlayer 2y ago
Implementing PCIe in the fabric without using the hard IP would be foolish, and definitely not the kind of thing I'd enjoy spending my time on! The design makes extensive use of the DSP48E2 and various BRAM/URAM blocks available i
3.
by PfhorSlayer 2y ago
The hardened DisplayPort IP is connected to the ARM cores, and requires a significant amount of configuration and setup. FuryGpu's firmware primarily handles interfacing with that block: setting up descriptor sets to DMA video frame an
4.
by PfhorSlayer 2y ago
Let's be clear here, this is a toy . Beyond being a fun project to work on that could maybe get my foot in the door were I ever to decide to change careers and move into hardware design, this is not going to change the GPU landscape o
5.
by PfhorSlayer 2y ago
In general, yes. However , the Kria series are amazingly good deals for what you get - a quite powerful Zynq US+ part and a dev board for like $350.
6.
by PfhorSlayer 2y ago
You've nailed the problem directly on the head. For hitting 60Hz in FuryGpu, I actually render at 640x360 and then pixel-double (well, pixel->quad) the output to the full 720p. Even with my GPU cores running at 400MHz and the textur
7.
by PfhorSlayer 2y ago
Next blog post will be covering exactly that! Probably going to do a multi-part series - first one will be the PCB schematic/layout, then the FPGA interfaces and testing, followed by Windows drivers.
8.
by PfhorSlayer 2y ago
You're in luck! https://imgur.com/a/BE0h9cZ As mentioned in the rest of this thread, the Kria SoMs are FPGA fabric with hardened ARM cores running the show. Beyond just being what was available (for oh so cheap,
9.
by PfhorSlayer 2y ago
I'm in the process of actually trying to work out what would be feasible performance-wise if I were to spent the considerable effort to add the features required for base D3D support. It's not looking good, unfortunately. Beyond j
10.
by PfhorSlayer 2y ago
Funny enough, that's exactly where this project started. After I built his 8 bit breadboard computer, I started looking into what might be involved in making something a bit more interesting. Can't do a whole lot of high-speed a
11.
by PfhorSlayer 2y ago
So, this is my project! Was somewhat hoping to wait until there was a bit more content up on the site before it started doing the rounds, but here we are! :) To answer what seems to be the most common question I get asked about this, I am i
12.
by PfhorSlayer 3y ago
If the FPGA contains a hard PCIe IP that can act as a host and the proper transceivers and the CPU implemented all of the necessary things to interface with it, it'd be about as difficult as writing a driver for any other machine. Actu
13.
by PfhorSlayer 3y ago
It's actually modeled very closely after Vulkan, but I couldn't think of a clever re-wording that would fit that and "Fury" together. I would have taken Vulkan's API as-is, but the hardware itself is fixed-function
14.
by PfhorSlayer 3y ago
Hey! I'm the developer of the FuryGPU, and it's very cool to see others working in a similar space - Doom is neat but Quake is where 3D graphics really came into their own. For anyone curious, FuryGPU is a full mid-90s-era GPU bui