There will be RISC-V implementions specific to many use cases of CPUs. I have to admit we were more in the "desktop" use case, then the 7GHz (I don't know how

There will be RISC-V implementions specific to many use cases of CPUs. I have to admit we were more in the "desktop" use case, then the 7GHz (I don't know how they will manage to keep the backend reasonably fed without severe speculation though).