7 ms·
To someone not familiar with CXL that still gives the wrong impression. As far as I have seen, CXL is supposed to be cache coherent, and should require less inv
by rpcope1 2mo ago
To someone not familiar with CXL that still gives the wrong impression. As far as I have seen, CXL is supposed to be cache coherent, and should require less invasive rework (if any at all) of applications to take advantage of it; that's part of the enablement of memory disaggregation that CXL is pushing towards (similar to the storage disaggregation push a decade or so ago).
- Aurornis 2mo agoTrue, but it’s still another level of NUMA with lower throughput and higher latency. In consumer boards with limited extra high speed lanes it could be a lot slower than main DDR5 RAM. Wouldn’t be fun to have your game or app run a lot slower if it happened to be loaded into the wrong part of memory.