9 ms·

The thing I love about blog posts like these is how it reminds me that the tech world is a vast ocean that encompasses so many disciplines; it's not all full st

The thing I love about blog posts like these is how it reminds me that the tech world is a vast ocean that encompasses so many disciplines; it's not all full stack web development. Related: I did not understand 95% of what she wrote.

tucnak 8mo ago
I wrote here a couple days ago: "For a Hacker News degenerate, everything in the world revolves around bean-counting B2B SaaS CRUD crapps, but it doesn't mean it's all there is to the world, right?"
- mcny 8mo ago
  I didn't even know that 180nm was still a thing but clearly it is because apparently the cost difference is like USD 100M for 180nm vs USD 10B or more for the latest tech? Is it true that we will likely have these 180nm chips for things like light bulbs for the foreseeable future?
  - caisley 8mo ago
    Yes, actually 180 nm still represents a sizable amount of the market, in terms of volume! In more niche applications where chips contain lots of analog functionlity, you can still find plenty of designs being done in 180, 130, 110, and 65 nm. Most corporate designs don't disclose this, but I'd venture to guess the majority of integrated circuits in your home are made on these larger "process nodes". I work in 65nm and 130nm, for example. Free to ask if you want to know more!
    - tucnak 8mo ago
      I'm not OP, but perhaps you, or somebody else here, could answer my question, albeit one that is slightly off-topic. In the recent years, in part courtesy of cryptoindustry investment, there were many advancements in zero-knowledge mathematics and applied cryptography. I've been on-and-off researching computational approaches to liquid democracy[1], on the off-chance that we may one day apply it in my country, Ukraine, and I came to conclusion that open hardware-as-public good are table stakes to that end. The modern computers are way too complex, and the trust in them is at an all-time low. To bring computation into politics—it's a tall order. However, if we could buy a fab, design some hardware transparently, allow inspections from civil groups and scientists, maybe that could work... What kind of costs are we looking at for establishing something like 130nm process, and would it be possible to buy out the necessary IP, too, so that everything could be done in the open? Does this even work longterm? I'd like to think transparent-by-design hardware manufacturing is not a pipe dream, but if that's the case, I would hate to give it too much thought. [1] https://en.wikipedia.org/wiki/Liquid_democracy https://en.wikipedia.org/wiki/Liquid_democracy
      - random_duck 8mo ago
        This project exists, here it is: https://opentitan.org/ https://opentitan.org/
        tucnak 8mo ago
        I previously came across OpenTitan, but it's hardware design only, right? It doesn't actually concern itself with bringing up transparent manufacturing process? For example, I couldn't find anything about the costs necessary to bring up a fab?
        ajb 8mo ago
        A project that addresses that issue is betrusted: https://betrusted.io/ https://betrusted.io/ Their plan for fab trust is not to bring up a fab,but to design for inspectability: https://bunnie.org/iris/ https://bunnie.org/iris/
        tucnak 8mo ago
        I happen to own a Precursor, and indeed used it for some experiments, but it's unfortunately limited by Xilinx Spartan-7 availability, which is one of the few FPGA's that have been reverse-engineered, and they probably don't make it anymore... Another one that has been RE'd is Lattice ECP5 but it's in the same category. I'm pretty sure you couldn't make 50 million devices like that. I know they've been looking into alternatives, but haven't caught up yet.
        ajb 8mo ago
        Their next one (https://baochip.com/ https://baochip.com/) is going to be a SoC, piggy backed on another company's SoC. So not completely open source RTL, but enough to prove their technology on a larger scale. Bunnie's presentation of it is here: https://media.ccc.de/v/39c3-xous-a-pure-rust-rethink-of-the-embedded-operating-system#t=1511 https://media.ccc.de/v/39c3-xous-a-pure-rust-rethink-of-the-... (25 minutes in)
      - 8mo ago
    - random_duck 8mo ago
      Thanks for offering. Do you do analog design, and which market niche are you targeting: low cost per part or something else?
      - caisley 8mo ago
        I work in custom CMOS image sensor design, targeting scientific imaging applications like electron microscopes, X-ray microscopy, and detectors for high-energy physics. Our designs aren't that cost sensitive from a unit cost perspective, because we are at most probably making several thousand of the chips. So the cost per chip can effectively range from 10-100$ at this scale, after yield losses. But the fixed costs of engineering and 'mask creation' for process nodes can range from 300k$ for nodes around 180 nm, to over 500k$ for 65nm, and above 1m$ for 28nm and below. We can save money during initial prototyping, by creating a small test structure as small as 1mmm^2, which reduces the cost of a prototype run to 5k$ - 10k$. Some services that provide this are MOSIS [0] in the US, and Europractice [1] in the EU. But when we go to a full production run, there's no way to get around creating a 'full reticle' design, as image sensors have a physical dimension determined by focal plan size requirement of imaging application. For example, in digital camera, if a sensor is 'full frame' then it obviously has to be 36mm x 24mm, regardless of if the process node would have let you shrink it. And if you make a serious mistake, then you need to do another production run, which means you pay the 300k$ - 1m$ once again. In terms of the circuit functionality, image sensors require a mixture of analog and digital design, but in this area, even many of the digital circuits are custom designed, rather than relying on foundry-provided 'standard cells' and an automatic place-and-route flow. [0] https://www.mosis.org/ https://www.mosis.org/ [1] https://europractice-ic.com/ https://europractice-ic.com/
        random_duck 8mo ago
        Oh thanks, this is really interesting. Is there a limit to how far you can scale down your node to build the full frame image sensor: is 180nm the largest feasible node?
        caisley 8mo ago
    - pjc50 8mo ago
      I work in a similar market, and we're only just starting to phase out these larger nodes and move to 22nm simply for wafer availability. It doesn't benefit from 22nm - analog blocks generally don't scale down at all, they have to be a particular size to achieve particular current handling, inductance etc. requirements. But we need the production line availability.
  - random_duck 8mo ago
    More thank light bulbs. As you have correctly pointed it out, its a matter of economics: 180nm is CHEAP! So a lot more things become economically viable, think of all the weird specialized ASICs that used to be to expensive to build.
    - lesser-shadow 8mo ago
      Not only that, but 180nm/130nm is the only option that is OpenSourced, as of now. Transistor Libraries for ICs (or, PDKs) have long been proprietary. I'm only aware of IHP and Sky130, which are actually banking on Fossi or Libre Silicon design.
  - RetroTechie 8mo ago
    That's what is expected to finally kill Moore's law: the economics. At some point it'll still be technically possible to fabricate smaller IC structures, stack more layers etc, but the tech to do so (and fabs to do it at scale) will be costly enough that it's just not worth it. The other point is of course a next-gen fab first needs to be built, and get those yields up. While previous-gen fab already exists - with all the fine-tuning already done & kinks ironed out. Not to mention maaanny applications simply don't need complex ICs (typical 32bit uC comes to mind, but even 8bit ones are still around).
random_duck 8mo ago
True, someone needs to build that computer after all.
pjc50 8mo ago
On some of my cover letters I wrote "full stack from the transistors upwards", because at one point or another I have shipped code in: - IC design software (at a startup bought by Cadence) - an IC (contract out of Dallas semi) - FPGA HFT acceleration - fixing some OS drivers for Windows CE - finding a compiler bug - various bits of embedded firmware in C and assembly for various platforms - debugging with a scope - desktop applications - a web server (defunct ZWS) - web apps (Perl. Long time ago) Somehow I've never written a react app.
- choilive 8mo ago
  > Somehow I've never written a react app. Count your blessings.
  - random_duck 8mo ago
    lol
- elevation 8mo ago
  When I first came to HN, I didn't know what `hn`, `pg`, or other initialisms meant. But I saw people boasting in the new vocabulary of "full stack developer." And I assumed that if companies loved "javascript down to redis" that they would really love that I could do front end all the way down to embedded development. Think of the problems all my full stack knowledge could solve! Never got an offer through "who's hiring" though.

tucnak 8mo ago

I wrote here a couple days ago: "For a Hacker News degenerate, everything in the world revolves around bean-counting B2B SaaS CRUD crapps, but it doesn't mean it's all there is to the world, right?"

mcny 8mo ago
I didn't even know that 180nm was still a thing but clearly it is because apparently the cost difference is like USD 100M for 180nm vs USD 10B or more for the latest tech? Is it true that we will likely have these 180nm chips for things like light bulbs for the foreseeable future?
- caisley 8mo ago
  Yes, actually 180 nm still represents a sizable amount of the market, in terms of volume! In more niche applications where chips contain lots of analog functionlity, you can still find plenty of designs being done in 180, 130, 110, and 65 nm. Most corporate designs don't disclose this, but I'd venture to guess the majority of integrated circuits in your home are made on these larger "process nodes". I work in 65nm and 130nm, for example. Free to ask if you want to know more!
  - tucnak 8mo ago
    I'm not OP, but perhaps you, or somebody else here, could answer my question, albeit one that is slightly off-topic. In the recent years, in part courtesy of cryptoindustry investment, there were many advancements in zero-knowledge mathematics and applied cryptography. I've been on-and-off researching computational approaches to liquid democracy[1], on the off-chance that we may one day apply it in my country, Ukraine, and I came to conclusion that open hardware-as-public good are table stakes to that end. The modern computers are way too complex, and the trust in them is at an all-time low. To bring computation into politics—it's a tall order. However, if we could buy a fab, design some hardware transparently, allow inspections from civil groups and scientists, maybe that could work... What kind of costs are we looking at for establishing something like 130nm process, and would it be possible to buy out the necessary IP, too, so that everything could be done in the open? Does this even work longterm? I'd like to think transparent-by-design hardware manufacturing is not a pipe dream, but if that's the case, I would hate to give it too much thought. [1] https://en.wikipedia.org/wiki/Liquid_democracy https://en.wikipedia.org/wiki/Liquid_democracy
    - random_duck 8mo ago
      This project exists, here it is: https://opentitan.org/ https://opentitan.org/
      - tucnak 8mo ago
        I previously came across OpenTitan, but it's hardware design only, right? It doesn't actually concern itself with bringing up transparent manufacturing process? For example, I couldn't find anything about the costs necessary to bring up a fab?
        ajb 8mo ago
        A project that addresses that issue is betrusted: https://betrusted.io/ https://betrusted.io/ Their plan for fab trust is not to bring up a fab,but to design for inspectability: https://bunnie.org/iris/ https://bunnie.org/iris/
        tucnak 8mo ago
        I happen to own a Precursor, and indeed used it for some experiments, but it's unfortunately limited by Xilinx Spartan-7 availability, which is one of the few FPGA's that have been reverse-engineered, and they probably don't make it anymore... Another one that has been RE'd is Lattice ECP5 but it's in the same category. I'm pretty sure you couldn't make 50 million devices like that. I know they've been looking into alternatives, but haven't caught up yet.
        ajb 8mo ago
        Their next one (https://baochip.com/ https://baochip.com/) is going to be a SoC, piggy backed on another company's SoC. So not completely open source RTL, but enough to prove their technology on a larger scale. Bunnie's presentation of it is here: https://media.ccc.de/v/39c3-xous-a-pure-rust-rethink-of-the-embedded-operating-system#t=1511 https://media.ccc.de/v/39c3-xous-a-pure-rust-rethink-of-the-... (25 minutes in)
    - 8mo ago
  - random_duck 8mo ago
    Thanks for offering. Do you do analog design, and which market niche are you targeting: low cost per part or something else?
    - caisley 8mo ago
      I work in custom CMOS image sensor design, targeting scientific imaging applications like electron microscopes, X-ray microscopy, and detectors for high-energy physics. Our designs aren't that cost sensitive from a unit cost perspective, because we are at most probably making several thousand of the chips. So the cost per chip can effectively range from 10-100$ at this scale, after yield losses. But the fixed costs of engineering and 'mask creation' for process nodes can range from 300k$ for nodes around 180 nm, to over 500k$ for 65nm, and above 1m$ for 28nm and below. We can save money during initial prototyping, by creating a small test structure as small as 1mmm^2, which reduces the cost of a prototype run to 5k$ - 10k$. Some services that provide this are MOSIS [0] in the US, and Europractice [1] in the EU. But when we go to a full production run, there's no way to get around creating a 'full reticle' design, as image sensors have a physical dimension determined by focal plan size requirement of imaging application. For example, in digital camera, if a sensor is 'full frame' then it obviously has to be 36mm x 24mm, regardless of if the process node would have let you shrink it. And if you make a serious mistake, then you need to do another production run, which means you pay the 300k$ - 1m$ once again. In terms of the circuit functionality, image sensors require a mixture of analog and digital design, but in this area, even many of the digital circuits are custom designed, rather than relying on foundry-provided 'standard cells' and an automatic place-and-route flow. [0] https://www.mosis.org/ https://www.mosis.org/ [1] https://europractice-ic.com/ https://europractice-ic.com/
      - random_duck 8mo ago
        Oh thanks, this is really interesting. Is there a limit to how far you can scale down your node to build the full frame image sensor: is 180nm the largest feasible node?
        caisley 8mo ago
  - pjc50 8mo ago
    I work in a similar market, and we're only just starting to phase out these larger nodes and move to 22nm simply for wafer availability. It doesn't benefit from 22nm - analog blocks generally don't scale down at all, they have to be a particular size to achieve particular current handling, inductance etc. requirements. But we need the production line availability.
- random_duck 8mo ago
  More thank light bulbs. As you have correctly pointed it out, its a matter of economics: 180nm is CHEAP! So a lot more things become economically viable, think of all the weird specialized ASICs that used to be to expensive to build.
  - lesser-shadow 8mo ago
    Not only that, but 180nm/130nm is the only option that is OpenSourced, as of now. Transistor Libraries for ICs (or, PDKs) have long been proprietary. I'm only aware of IHP and Sky130, which are actually banking on Fossi or Libre Silicon design.
- RetroTechie 8mo ago
  That's what is expected to finally kill Moore's law: the economics. At some point it'll still be technically possible to fabricate smaller IC structures, stack more layers etc, but the tech to do so (and fabs to do it at scale) will be costly enough that it's just not worth it. The other point is of course a next-gen fab first needs to be built, and get those yields up. While previous-gen fab already exists - with all the fine-tuning already done & kinks ironed out. Not to mention maaanny applications simply don't need complex ICs (typical 32bit uC comes to mind, but even 8bit ones are still around).

random_duck 8mo ago

True, someone needs to build that computer after all.

pjc50 8mo ago

On some of my cover letters I wrote "full stack from the transistors upwards", because at one point or another I have shipped code in: - IC design software (at a startup bought by Cadence) - an IC (contract out of Dallas semi) - FPGA HFT acceleration - fixing some OS drivers for Windows CE - finding a compiler bug - various bits of embedded firmware in C and assembly for various platforms - debugging with a scope - desktop applications - a web server (defunct ZWS) - web apps (Perl. Long time ago) Somehow I've never written a react app.

choilive 8mo ago
> Somehow I've never written a react app. Count your blessings.
- random_duck 8mo ago
  lol
elevation 8mo ago
When I first came to HN, I didn't know what `hn`, `pg`, or other initialisms meant. But I saw people boasting in the new vocabulary of "full stack developer." And I assumed that if companies loved "javascript down to redis" that they would really love that I could do front end all the way down to embedded development. Think of the problems all my full stack knowledge could solve! Never got an offer through "who's hiring" though.