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> Isn't translating between languages something that LLMs should excel at? No, not at all. Unless there is a large amount of training data relevant to the tran

> Isn't translating between languages something that LLMs should excel at? No, not at all. Unless there is a large amount of training data relevant to the translation then LLMs are likely just to make up nonsense. Chisel is a very niche hardware description language.

Pet_Ant 1y ago
Very niche? That's suprising to hear. I'm not in the space, and I know it's not in the big 2/3 (is SystemVerilog distinct from Verilog), but it's been around for 13 years and even DARPA has it on their radar: > Chisel is mentioned by the Defense Advanced Research Projects Agency (DARPA) as a technology to improve the efficiency of electronic design, where smaller design teams do larger designs. Google has used Chisel to develop a Tensor Processing Unit for edge computing [0] https://en.wikipedia.org/wiki/Chisel_(programming_language)#Use https://en.wikipedia.org/wiki/Chisel_(programming_language)#...
- bee_rider 1y ago
  I wonder if they just mean niche in the context of languages generally—human or programming? I mean there are, relatively speaking, boatloads and boatloads of open source software projects out there. Hardware open source projects, well a few exist…
- dkjaudyeqooe 1y ago
  Very niche on the scale of LLM training data.
- MobiusHorizons 1y ago
  I think it is niche in the sense that it is almost completely unused professionally. Most usage tends to be academic or hobbyist. I don’t mean to imply that it isn’t suitable for professional work, but more that it is not very easy to make work with the industrial EDA tools necessary for fabrication.
  - brucehoult 1y ago
    SiFive, the leading RISC-V IP vendor, with cores available (at the moment) up to around Cortex-X2 level, has been taping out chips from Chisel since 2016. Their first chip, a 32 bit microcontroller, ran at 320 MHz on TSC 180nm, while the comparable Arm Cortex-M4 was typically limited to 180 MHz on the same process node. The EIC7700X, using SiFive P550 cores, given nice solid Core 2 Quad (or Raspbery Pi 4) performance. SiFive's X280 cores are being used in rad-hard Microchip chips for NASA. This is not exactly "academic" or "hobby".
    - adrian_b 1y ago
      SiFive has been founded by "academics", including some of those who have designed Chisel. So it is no surprise that they have used their pet language. Except for them, the professional use of Chisel is rare, and the future of SiFive is unclear. Regardless how good it may be, it is difficult for any hardware-description language to replace the incumbents SystemVerilog and VHDL, because all designers are too dependent on whatever the foundries or the FPGA manufacturers support. Choosing another language is pretty much impossible, unless you translate it to either SystemVerilog or VHDL. If you do that, then it is hard to justify using another language instead of writing directly in SystemVerilog or VHDL.
      - GregarianChild 1y ago
        Chisel has a compiler to Verilog. That is not the problem. Many semi-companies use a tool-chain to generate much Verilog from higher-level sources. The rumour I heard was this: The problem with Chisel was that (at least in the past) the Chisel compiler did not preserve port structure well. So if you had a Chisel file that translated to 80M LoCs Verilog, then verified the 80M Verilog (which is very expensive), then made a tiny change to the source Chisel, the resulting new Verilog uses different port names even for the parts that were not affected by the change. (To quip: the (old?) Chisel compiler was a bit of a hash function ...) So you have to re-verify the whole 80M of Verilog. That is prohibitively expensive, compared to only reverifying the parts that truely need to change. The high verification costs forced by this problem were rumoured to nearly have sank a company. This is a compiler problem, not a Chisel language problem. I was told that the compiler problem has been fixed since. But I did not check this.

Pet_Ant 1y ago

Very niche? That's suprising to hear. I'm not in the space, and I know it's not in the big 2/3 (is SystemVerilog distinct from Verilog), but it's been around for 13 years and even DARPA has it on their radar: > Chisel is mentioned by the Defense Advanced Research Projects Agency (DARPA) as a technology to improve the efficiency of electronic design, where smaller design teams do larger designs. Google has used Chisel to develop a Tensor Processing Unit for edge computing [0] https://en.wikipedia.org/wiki/Chisel_(programming_language)#Use https://en.wikipedia.org/wiki/Chisel_(programming_language)#...

bee_rider 1y ago
I wonder if they just mean niche in the context of languages generally—human or programming? I mean there are, relatively speaking, boatloads and boatloads of open source software projects out there. Hardware open source projects, well a few exist…
dkjaudyeqooe 1y ago
Very niche on the scale of LLM training data.
MobiusHorizons 1y ago
I think it is niche in the sense that it is almost completely unused professionally. Most usage tends to be academic or hobbyist. I don’t mean to imply that it isn’t suitable for professional work, but more that it is not very easy to make work with the industrial EDA tools necessary for fabrication.
- brucehoult 1y ago
  SiFive, the leading RISC-V IP vendor, with cores available (at the moment) up to around Cortex-X2 level, has been taping out chips from Chisel since 2016. Their first chip, a 32 bit microcontroller, ran at 320 MHz on TSC 180nm, while the comparable Arm Cortex-M4 was typically limited to 180 MHz on the same process node. The EIC7700X, using SiFive P550 cores, given nice solid Core 2 Quad (or Raspbery Pi 4) performance. SiFive's X280 cores are being used in rad-hard Microchip chips for NASA. This is not exactly "academic" or "hobby".
  - adrian_b 1y ago
    SiFive has been founded by "academics", including some of those who have designed Chisel. So it is no surprise that they have used their pet language. Except for them, the professional use of Chisel is rare, and the future of SiFive is unclear. Regardless how good it may be, it is difficult for any hardware-description language to replace the incumbents SystemVerilog and VHDL, because all designers are too dependent on whatever the foundries or the FPGA manufacturers support. Choosing another language is pretty much impossible, unless you translate it to either SystemVerilog or VHDL. If you do that, then it is hard to justify using another language instead of writing directly in SystemVerilog or VHDL.
    - GregarianChild 1y ago
      Chisel has a compiler to Verilog. That is not the problem. Many semi-companies use a tool-chain to generate much Verilog from higher-level sources. The rumour I heard was this: The problem with Chisel was that (at least in the past) the Chisel compiler did not preserve port structure well. So if you had a Chisel file that translated to 80M LoCs Verilog, then verified the 80M Verilog (which is very expensive), then made a tiny change to the source Chisel, the resulting new Verilog uses different port names even for the parts that were not affected by the change. (To quip: the (old?) Chisel compiler was a bit of a hash function ...) So you have to re-verify the whole 80M of Verilog. That is prohibitively expensive, compared to only reverifying the parts that truely need to change. The high verification costs forced by this problem were rumoured to nearly have sank a company. This is a compiler problem, not a Chisel language problem. I was told that the compiler problem has been fixed since. But I did not check this.