7 ms·
Additional to what has been posted already, the shape of the lines (which ultimately will result in transistors) is defined by manufactured patterns on quartz g
by aastronaut 4y ago
Additional to what has been posted already, the shape of the lines (which ultimately will result in transistors) is defined by manufactured patterns on quartz glass photomasks[1]. AFAIK a modern processor design has a stack of around 40-60 masks placed in sequence for the light to pass through.
Producing these photomasks follows a similar manufacturing process from a lithography POV, except that electron-beams[2] are used instead of a light source. The mask manufacturing process requires its own specialized machines and Intel owns companies that produce those, eg. IMS Nanofabrication[3].
[1]: https://en.wikichip.org/wiki/mask https://en.wikichip.org/wiki/mask
[2]: https://en.wikipedia.org/wiki/Electron-beam_lithography https://en.wikipedia.org/wiki/Electron-beam_lithography
[3]: https://www.ims.co.at/en/ https://www.ims.co.at/en/
- nsteel 4y agoThe last I heard was TSMC's mask count for 3nm chips is back at just under 100. EULV had brought it down but it's right up there again at the latest node. You really need to avoid those all-layer re-spins!