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The end of Moore's law is like commercial fusion power--always just around the corner but it never seems to get here. It does seem like we should stop counting

by GavinB 10y ago

The end of Moore's law is like commercial fusion power--always just around the corner but it never seems to get here. It does seem like we should stop counting how many transistors fit in how much space. At this point, size isn't the limiting factor. Tracking either the cost of a unit of processing power or the total processing power of the planet would be more meaningful in benchmarking technological progress.

pedrocr 10y ago
Apparently by processing efficiency standards we've already peaked: 28nm: The Last Node of Moore's Law http://www.eetimes.com/author.asp?doc_id=1321536 http://www.eetimes.com/author.asp?doc_id=1321536
thoughtsimple 10y ago
The end of exponential growth is inevitable. We've reached the end of Moore's law as it applies to silicon wafers. We may be able to get to 5nm but no one really has an idea on how to do it and make a profit. Alternate technologies are just theoretical ideas that have no timeline for commercialization. The main point of the decline of Moore's law is that it is about economics as much as it is about the size of the features on a chip. Even if someone does figure out how to get to 5nm it may not be cost effective to mass produce chips at that size. Already we see that Intel can't afford to keep up with shrinking scale as they've moved away from their tick-tock cadence to tick-tock-tock. Intel has the most advanced materials research in the world and they can't make it work cost effectively. That indicates pretty clearly that the exponential scaling of transistors is over. Smaller transistors may still be possible or new materials may emerge but the future scaling isn't going to happen on Dr. Moore's timetable which is the basis for Moore's law.
- bluetomcat 10y ago
  > Even if someone does figure out how to get to 5nm it may not be cost effective to mass produce chips at that size. On top of that, it is not quite clear what would the hardware designers achieve with an increased transistor budget. CPU cores are becoming increasingly small in comparison to the surrounding circuitry (graphics, caches, control logic). We are bumped on clock speeds, too.
  - thoughtsimple 10y ago
    Mostly lower power from what I understand. Do phones, tablets, and small laptops really need more than 4 cores? Probably not. So the only thing you get is lower power and maybe smaller chips (which can help with the economics).
    - paulddraper 10y ago
      If you only run one NodeJS app at a time, probably not
  - DasIch 10y ago
    The obvious answer would be adding more CPU cores and surrounding circuitry. Especially on mobile it probably also makes a lot of sense to move more algorithms from software to hardware.
    - eli_gottlieb 10y ago
      >Especially on mobile it probably also makes a lot of sense to move more algorithms from software to hardware. Well that would seem to call for adding specialized coprocessors or even FPGA's, not just more CPU cores.
      - DasIch 10y ago
        I don't think AES or video decoding uses coprocessors or FPGAs, that's just implemented more or less like any other instruction. If you're going complete coprocessor, you can do much more like Apple has done with their motion coprocessors or the secure enclave.
  - slededit 10y ago
    I do wish Intel would make a high TDP i7 with improved single thread performance. I would even be OK with a water cooler. The lack of progress on thread perf is a huge problem.
    - 10y ago
- gene-h 10y ago
  Applied Materials presented a roadmap on how we might get to 3 nm using disappointingly conventional semiconductor processing techniques[0]. In short, you make the transistors tall and thin. [0] https://web.archive.org/web/20130810001315/http://www.semiconwest.org/sites/semiconwest.org/files/docs/SW2013_Adam%20Brand_Applied%20Materials.pdf https://web.archive.org/web/20130810001315/http://www.semico...
  - thoughtsimple 10y ago
    Maybe. Most of the presentation is beyond my knowledge level. But the 10nm & 7nm design is showing using a III-V FinFET. As far as I know, no one has that working yet. And as far as I can tell, this doesn't talk much about lithography. Multi patterning is reportedly going to be problem at 10nm and lower and EUV isn't ready yet either.
heathjohns 10y ago
Moore's law (as it is generally talked about) is actually a pretty good indication of how much computational power we can get from a single processor core. That, combined with Amdahl's law, means that the unmistakable levelling off that we're seeing now will place some pretty firm limits on what we can compute until we move off of silicon.
- bluetomcat 10y ago
  > Moore's law (as it is generally talked about) is actually a pretty good indication of how much computational power we can get from a single processor core. Imagine that we have the technology in place to manufacture silicon chips at 2nm. How would we design CPU cores with a substantially better single-thread performance, when clock speed is limited? Optimization techniques like OoO execution and register renaming have already been pushed to their extremes. Increasing caches beyond a certain point has been shown to deliver diminishing returns. We just don't know fundamentally how to design a substantially faster CPU core.
  - Retric 10y ago
    One option is to have multiple cores dedicated to the same workload and then switch between them as they heat up. There are many issues with this approach which make it impractical, but if your really do want speed at any cost then it may be worth it. PS: It's a Gatling CPU...
    - logfromblammo 10y ago
      And all you would need to sell them to the Army would be to make it play the "BRRRRRRRRRRRRRRRT!" from a GAU-8 over the system speaker whenever it is actively crunching numbers.
  - heathjohns 10y ago
    I don't disagree at all. There might be some gains to be had from stacking things high in 3D (reducing the physical distances a little). And there's clearly some room for improvement on the compute power per watt front, but even if (for example) the Mill CPU pans out, my impression is that there's not a huge amount of territory left in that direction either (at least on silicon), and the impact on max single-core performance would be limited. So yeah, the party's definitely over and it's down to more efficient software at this point until we get optical computing or rod logic or something crazy like that.
jbpetersen 10y ago
I agree. Going by a more general version of Moore's Law (cost of equivalent processing power being halved about every 18 months) then I don't see any end in sight, though we might need to change paradigms on what processing power means every now and then.

by GavinB 10y ago

pedrocr 10y ago

Apparently by processing efficiency standards we've already peaked: 28nm: The Last Node of Moore's Law http://www.eetimes.com/author.asp?doc_id=1321536 http://www.eetimes.com/author.asp?doc_id=1321536

thoughtsimple 10y ago

The end of exponential growth is inevitable. We've reached the end of Moore's law as it applies to silicon wafers. We may be able to get to 5nm but no one really has an idea on how to do it and make a profit. Alternate technologies are just theoretical ideas that have no timeline for commercialization. The main point of the decline of Moore's law is that it is about economics as much as it is about the size of the features on a chip. Even if someone does figure out how to get to 5nm it may not be cost effective to mass produce chips at that size. Already we see that Intel can't afford to keep up with shrinking scale as they've moved away from their tick-tock cadence to tick-tock-tock. Intel has the most advanced materials research in the world and they can't make it work cost effectively. That indicates pretty clearly that the exponential scaling of transistors is over. Smaller transistors may still be possible or new materials may emerge but the future scaling isn't going to happen on Dr. Moore's timetable which is the basis for Moore's law.

bluetomcat 10y ago
> Even if someone does figure out how to get to 5nm it may not be cost effective to mass produce chips at that size. On top of that, it is not quite clear what would the hardware designers achieve with an increased transistor budget. CPU cores are becoming increasingly small in comparison to the surrounding circuitry (graphics, caches, control logic). We are bumped on clock speeds, too.
- thoughtsimple 10y ago
  Mostly lower power from what I understand. Do phones, tablets, and small laptops really need more than 4 cores? Probably not. So the only thing you get is lower power and maybe smaller chips (which can help with the economics).
  - paulddraper 10y ago
    If you only run one NodeJS app at a time, probably not
- DasIch 10y ago
  The obvious answer would be adding more CPU cores and surrounding circuitry. Especially on mobile it probably also makes a lot of sense to move more algorithms from software to hardware.
  - eli_gottlieb 10y ago
    >Especially on mobile it probably also makes a lot of sense to move more algorithms from software to hardware. Well that would seem to call for adding specialized coprocessors or even FPGA's, not just more CPU cores.
    - DasIch 10y ago
      I don't think AES or video decoding uses coprocessors or FPGAs, that's just implemented more or less like any other instruction. If you're going complete coprocessor, you can do much more like Apple has done with their motion coprocessors or the secure enclave.
- slededit 10y ago
  I do wish Intel would make a high TDP i7 with improved single thread performance. I would even be OK with a water cooler. The lack of progress on thread perf is a huge problem.
  - 10y ago
gene-h 10y ago
Applied Materials presented a roadmap on how we might get to 3 nm using disappointingly conventional semiconductor processing techniques[0]. In short, you make the transistors tall and thin. [0] https://web.archive.org/web/20130810001315/http://www.semiconwest.org/sites/semiconwest.org/files/docs/SW2013_Adam%20Brand_Applied%20Materials.pdf https://web.archive.org/web/20130810001315/http://www.semico...
- thoughtsimple 10y ago
  Maybe. Most of the presentation is beyond my knowledge level. But the 10nm & 7nm design is showing using a III-V FinFET. As far as I know, no one has that working yet. And as far as I can tell, this doesn't talk much about lithography. Multi patterning is reportedly going to be problem at 10nm and lower and EUV isn't ready yet either.

heathjohns 10y ago

Moore's law (as it is generally talked about) is actually a pretty good indication of how much computational power we can get from a single processor core. That, combined with Amdahl's law, means that the unmistakable levelling off that we're seeing now will place some pretty firm limits on what we can compute until we move off of silicon.

bluetomcat 10y ago
> Moore's law (as it is generally talked about) is actually a pretty good indication of how much computational power we can get from a single processor core. Imagine that we have the technology in place to manufacture silicon chips at 2nm. How would we design CPU cores with a substantially better single-thread performance, when clock speed is limited? Optimization techniques like OoO execution and register renaming have already been pushed to their extremes. Increasing caches beyond a certain point has been shown to deliver diminishing returns. We just don't know fundamentally how to design a substantially faster CPU core.
- Retric 10y ago
  One option is to have multiple cores dedicated to the same workload and then switch between them as they heat up. There are many issues with this approach which make it impractical, but if your really do want speed at any cost then it may be worth it. PS: It's a Gatling CPU...
  - logfromblammo 10y ago
    And all you would need to sell them to the Army would be to make it play the "BRRRRRRRRRRRRRRRT!" from a GAU-8 over the system speaker whenever it is actively crunching numbers.
- heathjohns 10y ago
  I don't disagree at all. There might be some gains to be had from stacking things high in 3D (reducing the physical distances a little). And there's clearly some room for improvement on the compute power per watt front, but even if (for example) the Mill CPU pans out, my impression is that there's not a huge amount of territory left in that direction either (at least on silicon), and the impact on max single-core performance would be limited. So yeah, the party's definitely over and it's down to more efficient software at this point until we get optical computing or rod logic or something crazy like that.

jbpetersen 10y ago

I agree. Going by a more general version of Moore's Law (cost of equivalent processing power being halved about every 18 months) then I don't see any end in sight, though we might need to change paradigms on what processing power means every now and then.