dmitrygr

5 ms·

31.
by dmitrygr 21d ago
nope. two "slots", each selectable from {ARM, RISCV}. In each, you pick one. so you can configure it at two arm cores, arm + riscv, or two riscv cores. dual-arch is possible, if you desire it
32.
by dmitrygr 21d ago
RP2350 has separate cores for that. This is one core that speaks both.
33.
by dmitrygr 21d ago
fork() was always very restricted in when it could be used and really dangerous even then. It was made for a world where process == thread, and since that ceased to be true it's been a large footgun. Use spawn if you need to launch a p
34.
by dmitrygr 22d ago
Marketingslop. > Video editing: Decode, effects and export hand frames from one stage to the next, often across different cores. Those handoffs stay inside the cache instead of routing through the interconnect. Yeah... none of that needs
35.
by dmitrygr 23d ago
> There was a lovely window of a few years when processors were fast enough and low-power enough that real development work could trivially happen on a Macbook Air in a lounge. I was responding to this. I am appalled that anyone thinks (
36.
by dmitrygr 23d ago
No mention I can see of power consumption multiple compared to apple's chips at matching perf. My guess is 2x-5x
37.
by dmitrygr 25d ago
No idea what you are talking about. My battery lasts longer than ever while running vim and make and GCC. It’s amazing. Not sure why your windows are closing.
38.
by dmitrygr 26d ago
> by presenting a phone that no long contains evidence Evidence Tampering https://xkcd.com/1494/
39.
by dmitrygr 27d ago
The dirt (ground) of japan and singapore is not magic and does not confer safety, if that is what you are asking. It is a factor of something else > "my family is prohibited" christ almighty Yes, I take their safety seriously.
40.
by dmitrygr 29d ago
Some people reach a level of DGAF where it will not matter Some fuck-ups have such long-lasting effects that they outlast the NDAs that would cover them
41.
by dmitrygr 29d ago
this regulation is about replacement tires, which people buy... EV owners could (before this) also buy tires that no longer comply with this new regulation
42.
by dmitrygr 29d ago
> Maybe single occupancy personal vehicles are wasteful and mass transportation should be invested in rather than shaming individual no amount of shaming will make me not consider my family's safety. mass transit in CA (eg: https:&
43.
by dmitrygr 29d ago
Energy consumption. EVs being heavier, it actually matters more for them
44.
by dmitrygr 1mo ago
45 110 145 My desktop color since win2k until today
45.
by dmitrygr 1mo ago
in my opinion, yes. Given that it was a clean-sheet design with no legacy to support, and that it was done so recently as to have easily had the benefit of all the lessons of x86, mips, arm, sparc, powerpc, etc, yes, it left a lot of obvi
46.
by dmitrygr 1mo ago
Oscar Toledo, you are simply insane (in a good day). I bow my head in respect at the completely pointless and insanely impressive result.
47.
by dmitrygr 1mo ago
This is how you get vigilante justice. It is only held back by people believing that the state will treat them fairly in a court. Once the majority no longer believe that, you get chaos. I am entirely sure we do not want that. The correct a
48.
by dmitrygr 1mo ago
Did
49.
by dmitrygr 1mo ago
I am sorry if my point was not clear enough. I don’t advise anybody to stay away from it. In many ways it is good enough. I just think that if you were designing something from scratch, you could actually learn from past lessons, rather tha
50.
by dmitrygr 1mo ago
At least for me, I agree with both of the things you said. RISCV is a significant improvement on a lot of of the status quo in situations where it is currently getting design wins. But it also could’ve been a lot better in simple ways that
51.
by dmitrygr 1mo ago
With enough effort, you can make a brick fly. X86 proves this. But if you are designing a new flying device, despite the fact that you could make a brick fly, you probably don’t want to design a brick. Why make it harder on yourself? Riscv
52.
by dmitrygr 1mo ago
My apologies. I’ll update my shitpost with this example. :)
53.
by dmitrygr 1mo ago
> many, if not the vast majority, of aarch64 TBZ/TBNZ are probably branching on a boolean None are. There is CBZ/CBNZ for that. https://www.scs.stanford.edu/~zyedidia/arm64/cbnz.html It is just THAT u
54.
by dmitrygr 1mo ago
There is very cool history as to why. In armv5 the BL was two separate instructions . You could take an interrupt in between. And it was documented what each did. Veeery cool. Then they wanted more range. And now that they redefined the tw
55.
by dmitrygr 1mo ago
> NOBODY IS DOING THAT. RePalm kernel is literally that.
56.
by dmitrygr 1mo ago
I do wonder, which of the two of us actually worked for years in Apple’s kernel team? :)
57.
by dmitrygr 1mo ago
> RISC-V has by far the most compact code of any popular 64 bit ISA, Forgot to say “RISC”. Cause else: amd64
58.
by dmitrygr 1mo ago
We shall see :) When my iPhone or laptop is no longer running aarch64, i'll happily admit i had been wrong
59.
by dmitrygr 1mo ago
If those people build cores like linux kernel is built design-wise, i will PAY to watch the spectacle. You do realize that Linux got basic SMP support 3 years after NT, and it was shaky for a while after? It still does not have reliable sle
60.
by dmitrygr 1mo ago
Whom do you expect to work for free to design you a state-of-the-art core?

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