6 ms·
Verilator[0] can compile Verilog (which, in my opinion, is more friendly than VHDL) to C++ classes code. This is great tool for someone who don't want to spend
by kubov 12y ago
Verilator[0] can compile Verilog (which, in my opinion, is more friendly than VHDL) to C++ classes code. This is great tool for someone who don't want to spend money on hardware or use vendor specific tools. After compiling top-level module to C++ class, we can use it in code as a regular object.
[0] http://www.veripool.org/wiki/verilator http://www.veripool.org/wiki/verilator
- jamieiles 12y agoVerilator is an excellent tool, definitely recommended. I've been using it myself on a project and I have seen simulation times for tests drop from 22 seconds with Icarus down to 0.5 seconds with Verilator. Being able to easily call C code or DPI is a big win for testability.