One possibility is to use the neuromorphic chips as souped-up branch predictors -- instead of predicting one bit, as in a branch predictor, predict all bits rel

One possibility is to use the neuromorphic chips as souped-up branch predictors -- instead of predicting one bit, as in a branch predictor, predict all bits relevant for speculative execution. This can effect large-scale automatic parallelization. See this paper at ASPLOS '14 for details: http://hips.seas.harvard.edu/content/asc-automatically-scalable-computation http://hips.seas.harvard.edu/content/asc-automatically-scala...