8 ms·
I don't think that is exactly true. DRAM from SDRAM up has had a number of mode registers to control the ram. More info here: http://en.wikipedia.org/wiki/Synch
by kenz0r 12y ago
I don't think that is exactly true.
DRAM from SDRAM up has had a number of mode registers to control the ram. More info here: http://en.wikipedia.org/wiki/Synchronous_dynamic_random-access_memory#SDRAM_mode_register http://en.wikipedia.org/wiki/Synchronous_dynamic_random-acce...
- cnvogel 12y agoExactly. ...here's the table for command accesses on DDR4, including the mode register you referred to. http://en.wikipedia.org/wiki/DDR4_SDRAM#Command_encoding http://en.wikipedia.org/wiki/DDR4_SDRAM#Command_encoding