7 ms·
Reminds me fondly of the time I was writing assembler for the ARM2/3... it had such a nice instruction set that made hand-writing assembler pleasant. It had a
by stusmith1977 13y ago
Reminds me fondly of the time I was writing assembler for the ARM2/3... it had such a nice instruction set that made hand-writing assembler pleasant.
It had a "barrel shifter" that gave you free shifts of powers of two, so you could calculate screen byte offsets quickly:
// offset = x + y * 320
ADD R0, R1, R2, LSL #8
ADD R0, R0, R2, LSL #5
// = 2 cycles
It also had bulk loads and stores that made reading/writing RAM cheaper. The trick there was to spill as many registers as you possibly could, so that you could transfer as many words as possible per bulk load/store.
LDMIA R10!, {R0-R9}
STMIA R11!, {R0-R9}
// Transfers 40 bytes from memory pointed to by R10 to memory pointed to by R11,
// And updates both pointers to the new addresses,
// And only takes (3+10)*2 = 26 cycles to do the lot.
Happy days...
- mattbee 13y agoARM was my start with assembler too. But you appear to a have forgotten there are 5 more registers you can use for that blit ;-)
- stusmith1977 13y agoI can't remember how tight I made it... but I would think you need a couple spare: one for the number of iterations, and another for the screen stride. But yes, spilling registers like SP and LR is a useful trick if you need it.
- dmm 13y agoIf you ever feel like reliving a bit of your past the Game Boy Advance uses the ARMv3 instruction set. With an easily available flash cart you have a cool little portable system to develop on.
- eropple 13y agoNit: the GBA uses an ARM7TDMI that IIRC implements ARMv4T, which isn't a strict superset of ARMv3 (I think that's the first ARM that dropped the old crazy addressing). Still very fun to mess with.
- dmm 13y agoSorry about that! The ARM naming scheme confuses the hell out of me. I always mix up the processor generations and instruction sets.
- Sheepshow 13y agoHere's how that would look in the instruction set we use here ($100M commercial product) ; ARM spells it ADD R0, R1, R2, LSL #8 ; We spell it CLX R0 ; 1 cycles ADX R1 ; 1 ADX R2 ; 1 LDX N, 8 ; 3 RSX ; N (const 8 in this case) Try optimizing THAT!