27 ms·
That link is missing their evaluation of TRIPS, which they did in 2008 after they built the chips: http://www.cs.utexas.edu/~bmaher/pubs/asplos09.pdf http://www
by microarchitect 13y ago
That link is missing their evaluation of TRIPS, which they did in 2008 after they built the chips: http://www.cs.utexas.edu/~bmaher/pubs/asplos09.pdf http://www.cs.utexas.edu/~bmaher/pubs/asplos09.pdf
My impression is that TRIPS is much too complicated to be clocked at comparable frequencies to commercial processors. Their ISA also appears very hard to compile to.