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> Realistically, that sort of thing isn't useful as non-homogeneous architectures really suck for an application or OS to deal with. I agree that if each core
by bri3d 23d ago
> Realistically, that sort of thing isn't useful as non-homogeneous architectures really suck for an application or OS to deal with.
I agree that if each core doesn't "support" the full ISA it's a huge pain (the one generation of Intel AVX-512-but-not parts were incredible), but that hasn't been common in years. Usually (and in this case, according to my reading) the small cores get a horrible slow/decoder-emulated implementation of every instruction, so that if you schedule on the "wrong" core you don't trap but just run really slowly instead.
Otherwise, heterogeneous architectures are the present and future of mobile and consumer desktops and have been for years. Desktop OSes are getting better and mobile OSes are just fine at scheduling across different core families (the higher level of abstraction everyone complains about in mobile apps actually helps a lot here).
- tensegrist 23d agodidn't intel discontinue heterogeneous (laptop?) chips recently
- bri3d 23d agoOnly server, as far as I know. Server is now either high-density E core (Sierra Forest) or low-density P core (Granite Rapids), but desktop and laptop are heterogeneous still; laptops are getting even more heterogeneous because they have P-Cores, E-cores, and Low Power Island cores.
- wtallis 23d agoDid Intel ever ship any heterogeneous server parts? I'm not aware of any, and it looks like even the Raptor Lake desktop silicon sold under the Xeon brand only had P-cores enabled. The worst of Intel's processor core asymmetry was with Meteor Lake and Arrow Lake, where the two LP-E cores on the IO die had no L3 cache and really bad DRAM latency despite being directly adjacent to the DRAM controller, resulting in those two cores combined offering about as much performance as one of the E-cores on the CPU chiplet. And they used the same IO die across both generations, while updating the microarchitecture of the CPU chiplet, so things diverged even more. And because the performance of the LP-E cores was so bad, Windows wouldn't schedule any threads on them unless it was trying to operate exclusively on those LP-E cores with the CPU chiplet powered down entirely—but those two LP-E cores were still reported to software in the total thread count, so heavy multithreaded applications would launch two more threads than could actually be scheduled at once. With Panther Lake, Intel still has three tiers of CPU cores, but the performance gap between E cores and LP-E cores is down to only about 10%.