More to the point x86 instruction streams aren't self-synchronizing. There are cases where you can read one valid stream of x86 instructions starting at byte X

More to the point x86 instruction streams aren't self-synchronizing. There are cases where you can read one valid stream of x86 instructions starting at byte X, but another completely different one starting at byte X+1. Apart from the security implications this makes wide decode on x86 notably harder than it has to be, though in practice you can make it work by just starting a decode your fetch window at every byte boundary the fist time you're executing something and throwing away the unused decodes, and then mark the invalid positions in the instruction cache so you don't waste that power again.