6 ms·
CISC view: Its another adressing mode. RISC view: SUBLEQ is already four instructions (2x memory access, alu, branch)
by cpldcpu 3mo ago
CISC view: Its another adressing mode.
RISC view: SUBLEQ is already four instructions (2x memory access, alu, branch)
- jpegqs 3mo ago3x memory access then, because read+read+write. And extra 0 to 3 reads in this work.