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they all suck. someone needs to make an open source gpu already, its been way too long.
by webdevver 1y ago
they all suck. someone needs to make an open source gpu already, its been way too long.
- ekianjo 1y agoIt's probably a series of patent landmines...
- AnthonyMouse 1y agoHardware patents are orthogonal to open source software. If a patent covers the hardware then someone who wants to manufacture the hardware needs to license the patent, but you were never going to get free-as-in-beer hardware anyway, and a hardware patent is independent of whether the hardware is fully documented or has firmware with published source code and a license that allows users to make changes to it.
- Joel_Mckay 1y agoIndeed, most IP used in silicon design are licensed, cost real money, and are under NDA. I wouldn't say "never", but a clone is highly unlikely for another decade or so. =3
- AnthonyMouse 1y agoNDAs in the context of a patent license should legitimately be considered grounds for patent invalidation. Patent literally means "open to public inspection" and the entire premise is that you get a temporary monopoly in exchange for openly documenting how your invention works in the published patent. If there is something about the invention for an NDA to cover it means you left it out of the patent application, which is essentially an admission of wrongdoing. A patent is an alternative to a trade secret. You can't eat your cake and still have it.
- Joel_Mckay 1y agoPatents do exist on popular IP cores, but in general standards compliant Verilog libraries are just vendor specific IP products. Thus, the copyright, NDA, and license agreements already keep the IP fairly locked down. For example, figuring out dram timing and DDR bus control yourself is nontrivial. Some groups have attempted open IP cores, and made some progress: https://opencores.org/ https://opencores.org/ However, the effort involved in getting standards compliant ASIC built puts folks in a Fabless manufacturing sector. Most firms that survive, will choose to stay with a generic FPGA option to avoid custom silicon unless absolutely necessary. Patents are often useless/vague in many places, but on occasion may prevent platform decay for a few years. One can be sure a unique/new design will not go to fab unless such protection is in place. =3
- AnthonyMouse 1y agoIt seems like the fab companies like TSMC/Samsung/GF/Intel are missing an opportunity here. Commoditize your complement: https://gwern.net/complement https://gwern.net/complement Publish the software that does this for free so that more customers come to you instead of using FPGAs or just not making the attempt. Make it easier to design new chips so that more people do it and you get more customers.
- Joel_Mckay 1y agoWhen it comes to hardware, the OSS model stops making economic sense. People have tried, but helping other competitors for free rapidly decays the market. =3 Rule #23: Don't compete to be at the bottom, as you just might actually win.
- AnthonyMouse 1y agoThe point isn't to help your competitors, it's to help your customers. Qualcomm or Apple doesn't have the incentive to help their competitors design chips, but TSMC or Samsung does have the incentive to help Qualcomm's competitors design chips, because then there are more companies making chips and the fab gets more business and prevents any one of their customers from getting too much leverage over them.
- timschmidt 1y agoWe did back in 2007: https://en.wikipedia.org/wiki/Open_Graphics_Project https://en.wikipedia.org/wiki/Open_Graphics_Project And there have been some others as well: https://en.wikipedia.org/wiki/Free_and_open-source_graphics_device_driver#Open_hardware_projects https://en.wikipedia.org/wiki/Free_and_open-source_graphics_... Recently https://www.furygpu.com/ https://www.furygpu.com/ Part of the problem is that every ASIC manufacturer (and indeed each fabrication process) has a different toolchain with a different set of primitives for circuit design. Yosys and other open tooling for FPGAs has helped a great deal in lowering the barrier to chip design and by association reuse of circuits. But every ASIC, at the moment, is tied to some vendor's PDK. Here's the one Google open sourced for Cypress Semi's SKY130 process node: https://github.com/google/skywater-pdk https://github.com/google/skywater-pdk
- Findecanor 1y agoIt is at least theoretically possible to build a headless "GPU" from RISC-V processors that have the vector extension (RVV). RVV had been designed to be able to run programs compiled for the SIMT execution model that most GPUs use. This Orange Pi RV2 has a small vector unit in each core, and could be used for at least prototyping the software until more powerful chips are available. BTW. There have also been a couple hardware startups that have been working on commercial GPUs based on RISC-V's vector extension, with their own GPU-specific instruction set extensions for texture lookup and the like.
- LeFantome 1y agohttps://www.tomshardware.com/pc-components/gpus/startup-claims-its-zeus-gpu-is-10x-faster-than-nvidias-rtx-5090-bolts-first-gpu-coming-in-2026 https://www.tomshardware.com/pc-components/gpus/startup-clai...
- Joel_Mckay 1y agoThe 94% market dominance of CUDA GPUs will roast new competition for sure. RISC-V has a fragmented ISA standard, and every version is a magical unicorn part (the worst facet of ARM6.) A Standard doesn't need to be good, but must be consistent to succeed. =3
- dlcarrier 1y agoThe vector instructions are only in four of the eight cores. There's also extra cache in those cores, but they are otherwise symmetrical to the other four.