This is awesome. I've had similar ideas but wasn't able to do any prototyping yet as I only have Pico 2 boards that don't expose the CSn pin in the pinout. Rat

This is awesome. I've had similar ideas but wasn't able to do any prototyping yet as I only have Pico 2 boards that don't expose the CSn pin in the pinout. Rather than UART booting every time I thought it might be nice to use UART Boot just as a way to deliver the firmware update to the sub chip - so the UART image you load would just be a program that accepts a larger image (over UART again) and would write to the flash for subsequent boots. I think that would get around the SRAM and boot time downsides the author mentioned. Is there a reason this might not work?