8 ms·
The Pico 1 (i.e. the RP2040) doesn't. The Pico 2 (RP2350) does, albeit a fair bit slower (since it's QSPI PSRAM) than the internal SRAM.
by drrotmos 2y ago
The Pico 1 (i.e. the RP2040) doesn't. The Pico 2 (RP2350) does, albeit a fair bit slower (since it's QSPI PSRAM) than the internal SRAM.
- crest 2y agoThe RP2040 has a single QSPI controller channel, but with clever hacks you can multiplex that to boot from SPI and switch over to some other (Q)SPI peripheral, but iirc you can't write directly (can be emulated via MPU+DMA). What's also quite neat is that you can use the external flash cache as 16kiB SRAM tiled repeatedly over a 16MiB memory window. By abusing the MPU you can allow/trap accesses down to 256 byte granularity and implement virtual memory (allow only one alias address at a time, treat the 16kiB SRAM as a direct mapped cache, and demand page from QSPI, other SRAM banks, or whatever you can come up with).