Awesome! When I was an undergraduate all I could tape out was a small wafer of capacitors and correlate theoretical vs silicon. Chisel is no doubt a developer

Awesome! When I was an undergraduate all I could tape out was a small wafer of capacitors and correlate theoretical vs silicon. Chisel is no doubt a developer velocity booster. And generating those components does help speed you along especially when they’re silicon proven. But I’d wager that most industry silicon has a competitive edge to pay off the NRE, something bleeding edge that can’t get away from verilog interop.