Mostly you still have to use their tools, Chisel just compiles to Verilog and then you use their tools for the rest of the process. There are open source tools

Mostly you still have to use their tools, Chisel just compiles to Verilog and then you use their tools for the rest of the process. There are open source tools based on reverse engineering the bitstream for some smaller FPGAs like the Lattice family, some preliminary work on Xilinx, and one vendor actually supporting the open source toolchain (QuickLogic), but for anything serious on the major FPGA platforms, you still need to use the vendor toolchain.