8 ms·
The chip itself can have up to 64k Flash (and another 64k of RAM). But the CPU accesses the memory via a MMU that can map the 1M address space into (mostly) 64k
by hummus_bae 4y ago
The chip itself can have up to 64k Flash (and another 64k of RAM). But the CPU accesses the memory via a MMU that can map the 1M address space into (mostly) 64k chunks. So effectively the OS can use 1M physical addresses and the CPU itself uses close to 64k of them (depending on how you configure the MMU).
edit: so the whole address space of 1M can be mapped via the MMU into 64k installments.
- AnotherGoodName 4y agoPretty similar to many CPUs of that era. x86 included. https://en.wikipedia.org/wiki/X86_memory_segmentation https://en.wikipedia.org/wiki/X86_memory_segmentation
- postalrat 4y agoAnd the many mappers NES and other consoles used: https://www.nesdev.org/wiki/Mapper https://www.nesdev.org/wiki/Mapper