7 ms·
> If anyone has an idea why the TIA’s designers used LFSRs for this stuff, I’d love to hear about it. I'm guessing because a counter would have ripple carry (i
by a1k0n 4y ago
> If anyone has an idea why the TIA’s designers used LFSRs for this stuff, I’d love to hear about it.
I'm guessing because a counter would have ripple carry (i.e. five extra gate delays when rolling over from 111111 to 000000) or need extra gates for carry lookahead and an LFSR is constant-delay.
- djmips 4y agoThe latency notwithstanding, you can implement a counter with an LFSR that hits every unique value in a 2^n-1 sequence with less transistors than a standard counter.
- userbinator 4y agoThis is the reason. LFSRs are much simpler to implement, and in those days, every transistor saved was very important. Some early microprocessors used LFSRs instead of a regular counter for their instruction pointer register for this reason: https://news.ycombinator.com/item?id=8375577 https://news.ycombinator.com/item?id=8375577