32 ms·
It's still non-esoteric today: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0439b/Behcjiic.html http://infocenter.arm.com/help/index.jsp?topi
by cnvogel 8y ago
It's still non-esoteric today:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0439b/Behcjiic.html http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc....
ARM Cortex M4 supports adressing individual bits (often registers of hardware peripherals) of memory locations as one additional memory location writing to, or reading from a single bit.
e.g., from the examples of said infocenter url:
*(uint32_t*)0x20000000 |= (1<<7)
*(uint32_t*)0x20000000 &= ~(1<<7)
should be equivalent to
*(uint32_t*)0x2200001C = 1;
*(uint32_t*)0x2200001C = 0;
Also Analog Sharc DSPs (which, I think, still are being sold with this architecture, and still used, even though I've used them only 10 years ago) alias their memory four times, depending if you want to access it as 16bit, 32bit, 48 or 64bit data.
- Taniwha 8y agoI think you're missing 'volatile's in your casts
- foxhill 8y agowhy would you need that in this case?
- saagarjha 8y agoProbably so the compiler doesn't just optimize out the statements, seeing as they don't seem to have a visible effect on the program execution because they're never read again.
- Taniwha 8y agobecause writing to one location causes the data to change in another (a system register) you don't want the compiler to assume that data in an IO register can be cached in a CPU register
- cnvogel 8y agoThe examples should only view the bit/address mapping, not be a complete example on how to access memory mapped peripherals.