27 ms·

The Tyranny of the Clock (2012) [pdf]

• ultrafilter 8y ago
  The author's more recent work is here: http://arc.cecs.pdx.edu/publications http://arc.cecs.pdx.edu/publications
• jimnotgym 8y ago
  When I read the title I was reminded of this https://youtu.be/tVT2Xi1kwx0 https://youtu.be/tVT2Xi1kwx0
• vinutheraj 8y ago
  Related talk by the author (Ivan Sutherland): https://www.youtube.com/watch?v=jR9pAaQlVRc https://www.youtube.com/watch?v=jR9pAaQlVRc
• oystercatcher 8y ago
  in verilog there is a distinction between asynchronous combinatorial logic and synchronous sequential logic wires are treated as transmission lines