6 ms·
You should be careful with this, you'll wear a hole in your instruction set.
by liquidzoot 10y ago
You should be careful with this, you'll wear a hole in your instruction set.
- sonthonax 10y agoDumb question, could that actually happen? Could you actually use a particular set of transistors so much with this that they break?
- detaro 10y agoYes, but you probably need something more sophisticated than just running the same instruction type over and over again: https://dl.acm.org/citation.cfm?id=2744295.2724718 https://dl.acm.org/citation.cfm?id=2744295.2724718
- versteegen 10y agoWow, thanks, that's a fascinating paper! Direct link to pdf: [1]. So it turns out that if a transistor is kept on continuously its threshold voltage gradually increases (Negative-Bias Temperature-Instability (NBTI)), increasing the switching delay. This attack targets transistors along the critical path, increasing the path's delay until it exceeds the allowed tolerance (guardband). Turning the transistor off "heals" it; as a workaround they suggest periodically executing certain nop instructions to ensure critical path transistors spend at least 0.05% of their time turned off. They perform simulations using models of 45nm high-k PMOS transistors to produce their results. A good quote about processor reliability: Guardbanding is the current industrial practice to cope with transistor aging and voltage droops [Agarwal et al. 2007]. It entails slowing down the clock frequency (i.e., adding timing margin during design) based on the worst degradation the transistors might experience during their lifetime. The guardbands ensure that enough current passes through the processor to keep it above the threshold voltage and in turn ensure that the processor functionality is intact for an average period of 5 to 7 years [Tiwari and Torrellas 2008]. However, inserting wide guardbands degrades performance and increases energy consumption. Hence, processor design companies usually have small guardbands, typically 10% [Agarwal et al. 2007]. However, the MAGIC-based attack can deteriorate the critical path by 11% and cause erroneous results in 1 month. This also explains why overclocking a CPU may be a bad idea, although they also show that random instructions don't come close to the worst case ageing. [1] https://www.researchgate.net/profile/Naghmeh_Karimi/publication/275720759_MAGIC_Malicious_aging_in_CircuitsCores/links/5564bf1e08aec4b0f4859151.pdf https://www.researchgate.net/profile/Naghmeh_Karimi/publicat...
- slacka 10y agoThis wouldn't do any noticeable damage. Modern CPUs have excellent thermal management. As far a wear goes, a hot spot in chip would in theory slightly decrease the long life span of a CPU. If you expanded your question to hardware in the computer, then yes you can easily cause damage. BIOS’s can be flashed to make the system unbootable or overclock/stress components. Back in the bad old days of Linux, you could easily damage your monitor with the wrong xorg.conf settings. Your question got me thinking what’s the MTBF of modern CPUs? My google-fu failed me finding any reliable source of this, but I’m sure it’s long, 10+ years.
- userbinator 10y agoYour question got me thinking what’s the MTBF of modern CPUs? My google-fu failed me finding any reliable source of this, but I’m sure it’s long, 10+ years. Probably decreasing, and soon not much longer than warranty period... the transistors have gotten so small that they're on the threshold of barely working even in normal operation. As for older CPUs, they could definitely last many decades because of the lower stresses of larger process sizes, and they were designed with much higher margins.
- CyberDildonics 10y agoDo you have anything to back this up?
- versteegen 10y agoAccording to the paper linked in another comment (https://news.ycombinator.com/item?id=12373015 https://news.ycombinator.com/item?id=12373015), apparently the high-k dielectric nodes used at 45nm and below show ~5x times worse NBTI ageing than non-high-k 45nm PMOS gates, which decides the tolerances that are selected to provide X years of life. (IANAEE)
- stcredzero 10y agoBack in the bad old days of Linux, you could easily damage your monitor with the wrong xorg.conf settings. Back when a certain kind of line printer was commonplace (has a circulating ribbon with the typeface repeated, and n hammers in a line going across the entire width) programmers could sabotage the printer by printing the pattern on the ribbon. This would cause all of the hammers to fire at once, which the machine wasn't designed to withstand. I've also heard of monitors being broken by having the speaker output the resonant frequency of the glass cover. However, I can't vouch for this one.
- TazeTSchnitzel 10y agoProbably not for MOV, given x86 uses it a heck of a lot anyway, so surely processors are already equipped to handle it.
- amelius 10y agoWell, I think this can be answered by considering that even under normal conditions there are transistors that are used as much as in your hypothetical scenario. For example, the instruction decoding logic is invoked for every instruction. Since all logic transistors are the same (afaik), I don't think that using one type of instruction would significantly reduce the life-time of your CPU.
- deleted 10y ago[deleted]
- koytch 10y agoUhm, not really, but you might make 20 smaller ones. http://x86.renejeschke.de/html/file_module_x86_id_176.html http://x86.renejeschke.de/html/file_module_x86_id_176.html
- mappu 10y agoYou should also regularly rotate your CPU in its socket, to ensure all the cores wear evenly.